From patchwork Mon Apr 13 00:20:55 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Mike Turquette X-Patchwork-Id: 47094 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-wg0-f69.google.com (mail-wg0-f69.google.com [74.125.82.69]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id A695B2121F for ; Mon, 13 Apr 2015 00:24:13 +0000 (UTC) Received: by wgin8 with SMTP id n8sf14006759wgi.0 for ; Sun, 12 Apr 2015 17:24:12 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:mime-version:to:from:in-reply-to :references:message-id:user-agent:subject:date:cc:precedence:list-id :list-unsubscribe:list-archive:list-post:list-help:list-subscribe :content-type:content-transfer-encoding:sender:errors-to :x-original-sender:x-original-authentication-results:mailing-list; bh=OcCO6i6P6015DDz/2zkvAf7S9Ve6eOFJ2c99b/7bHeg=; b=Bj+SJKtfigGRDzae7Daf1g3PivfJlcVz6P4XoAuXhy8ZfNLySxwZrcwi16PhiEynJW 7bgJ3m2aVketSjmOJUMmQACHFf9K+tUBxCyTyCC0Xc0F4Wtg5uzMkmcRUE2teLAis0sx TKO+5kGiWh2fMJJpCT9pmMgAbm/sWNiHGYW1gNcGbzDZc+oVYOfSB+GEg26t17iQPyxv QDqSR+vIL6Tmy0mhIRDNBkeqowdYTnHRushxh0jZFsAHrpd8bwK+P87VXJiopcq8gaXf Uy1Mv2nkroidBtxHLZNjMwL7dHHES2YlHQAW2b/zGGoV+o0W/LQGeG1MPH4zkDT0V1Uh hLtQ== X-Gm-Message-State: ALoCoQnRK+z9pR/V9rRjZ7kFeWqcD46JabF5y699KmFiC5uv17iDeCCXnGAMHBWfpsPAs71NloxG X-Received: by 10.112.118.162 with SMTP id kn2mr1794922lbb.22.1428884652580; Sun, 12 Apr 2015 17:24:12 -0700 (PDT) X-BeenThere: patchwork-forward@linaro.org Received: by 10.152.197.34 with SMTP id ir2ls613881lac.84.gmail; Sun, 12 Apr 2015 17:24:12 -0700 (PDT) X-Received: by 10.112.120.199 with SMTP id le7mr10799973lbb.48.1428884652336; Sun, 12 Apr 2015 17:24:12 -0700 (PDT) Received: from mail-lb0-f179.google.com (mail-lb0-f179.google.com. [209.85.217.179]) by mx.google.com with ESMTPS id kd4si7103408lbc.42.2015.04.12.17.24.12 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 12 Apr 2015 17:24:12 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.179 as permitted sender) client-ip=209.85.217.179; Received: by lbbuc2 with SMTP id uc2so47168335lbb.2 for ; Sun, 12 Apr 2015 17:24:12 -0700 (PDT) X-Received: by 10.112.184.70 with SMTP id es6mr10741361lbc.117.1428884651967; Sun, 12 Apr 2015 17:24:11 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.67.65 with SMTP id l1csp919790lbt; Sun, 12 Apr 2015 17:24:10 -0700 (PDT) X-Received: by 10.55.22.222 with SMTP id 91mr24386341qkw.101.1428884649920; Sun, 12 Apr 2015 17:24:09 -0700 (PDT) Received: from bombadil.infradead.org (bombadil.infradead.org. [2001:1868:205::9]) by mx.google.com with ESMTPS id i5si9228069qgf.23.2015.04.12.17.24.09 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 12 Apr 2015 17:24:09 -0700 (PDT) Received-SPF: none (google.com: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org does not designate permitted sender hosts) client-ip=2001:1868:205::9; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YhS82-0006eF-CW; Mon, 13 Apr 2015 00:21:30 +0000 Received: from mail-ig0-f179.google.com ([209.85.213.179]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YhS7x-0006dZ-6n for linux-arm-kernel@lists.infradead.org; Mon, 13 Apr 2015 00:21:27 +0000 Received: by igbqf9 with SMTP id qf9so32661983igb.1 for ; Sun, 12 Apr 2015 17:21:03 -0700 (PDT) X-Received: by 10.107.128.149 with SMTP id k21mr17296257ioi.7.1428884462833; Sun, 12 Apr 2015 17:21:02 -0700 (PDT) Received: from localhost (pool-71-119-96-202.lsanca.fios.verizon.net. [71.119.96.202]) by mx.google.com with ESMTPSA id s85sm3954235ioe.28.2015.04.12.17.21.00 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Sun, 12 Apr 2015 17:21:01 -0700 (PDT) MIME-Version: 1.0 To: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , From: Michael Turquette In-Reply-To: <20150325104117.GD32677@pengutronix.de> References: <1424253585-27011-1-git-send-email-u.kleine-koenig@pengutronix.de> <20150325104117.GD32677@pengutronix.de> Message-ID: <20150413002055.19585.30736@quantum> User-Agent: alot/0.3.5 Subject: Re: [PATCH] clk: don't use __initconst for non-const arrays Date: Sun, 12 Apr 2015 17:20:55 -0700 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150412_172125_366157_B7BBF829 X-CRM114-Status: GOOD ( 16.85 ) X-Spam-Score: -0.7 (/) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-0.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.213.179 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3) [209.85.213.179 listed in wl.mailspike.net] -0.0 RCVD_IN_MSPIKE_WL Mailspike good senders Cc: kernel@pengutronix.de, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: mturquette@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.179 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 Quoting Uwe Kleine-König (2015-03-25 03:41:17) > On Wed, Feb 18, 2015 at 10:59:45AM +0100, Uwe Kleine-König wrote: > > The statement > > > > static const char *name[]; > > > > defines a modifiable array of pointers to constant chars. That is > > > > *name[0] = 'f'; > > > > is forbidden, but > > > > name[0] = "f"; > > > > is not. So marking an array that is defined as above with __initconst is > > wrong. Either an additional const must be added such that the whole > > definition reads: > > > > static const char *const name[] __initconst; > > > > or where this is not possible __initdata must be used. > > > > Signed-off-by: Uwe Kleine-König > gentle ping Gently applied w/ a small fix rolled in: Thanks for the fix, Mike > > Uwe > > > --- > > drivers/clk/hisilicon/clk-hi3620.c | 70 ++++++++++++++++++------------------- > > drivers/clk/hisilicon/clk-hix5hd2.c | 6 ++-- > > drivers/clk/mxs/clk-imx23.c | 12 +++---- > > drivers/clk/mxs/clk-imx28.c | 18 +++++----- > > drivers/clk/pxa/clk-pxa.h | 2 +- > > drivers/clk/rockchip/clk-rk3188.c | 2 +- > > drivers/clk/rockchip/clk-rk3288.c | 2 +- > > drivers/clk/rockchip/clk.c | 3 +- > > drivers/clk/rockchip/clk.h | 2 +- > > drivers/clk/samsung/clk-s5pv210.c | 56 ++++++++++++++--------------- > > drivers/clk/ti/composite.c | 2 +- > > drivers/clk/zynq/clkc.c | 24 ++++++------- > > 12 files changed, 100 insertions(+), 99 deletions(-) > > > > diff --git a/drivers/clk/hisilicon/clk-hi3620.c b/drivers/clk/hisilicon/clk-hi3620.c > > index 007144f81f50..480c24e24f8e 100644 > > --- a/drivers/clk/hisilicon/clk-hi3620.c > > +++ b/drivers/clk/hisilicon/clk-hi3620.c > > @@ -38,44 +38,44 @@ > > #include "clk.h" > > > > /* clock parent list */ > > -static const char *timer0_mux_p[] __initconst = { "osc32k", "timerclk01", }; > > -static const char *timer1_mux_p[] __initconst = { "osc32k", "timerclk01", }; > > -static const char *timer2_mux_p[] __initconst = { "osc32k", "timerclk23", }; > > -static const char *timer3_mux_p[] __initconst = { "osc32k", "timerclk23", }; > > -static const char *timer4_mux_p[] __initconst = { "osc32k", "timerclk45", }; > > -static const char *timer5_mux_p[] __initconst = { "osc32k", "timerclk45", }; > > -static const char *timer6_mux_p[] __initconst = { "osc32k", "timerclk67", }; > > -static const char *timer7_mux_p[] __initconst = { "osc32k", "timerclk67", }; > > -static const char *timer8_mux_p[] __initconst = { "osc32k", "timerclk89", }; > > -static const char *timer9_mux_p[] __initconst = { "osc32k", "timerclk89", }; > > -static const char *uart0_mux_p[] __initconst = { "osc26m", "pclk", }; > > -static const char *uart1_mux_p[] __initconst = { "osc26m", "pclk", }; > > -static const char *uart2_mux_p[] __initconst = { "osc26m", "pclk", }; > > -static const char *uart3_mux_p[] __initconst = { "osc26m", "pclk", }; > > -static const char *uart4_mux_p[] __initconst = { "osc26m", "pclk", }; > > -static const char *spi0_mux_p[] __initconst = { "osc26m", "rclk_cfgaxi", }; > > -static const char *spi1_mux_p[] __initconst = { "osc26m", "rclk_cfgaxi", }; > > -static const char *spi2_mux_p[] __initconst = { "osc26m", "rclk_cfgaxi", }; > > +static const char *timer0_mux_p[] __initdata = { "osc32k", "timerclk01", }; > > +static const char *timer1_mux_p[] __initdata = { "osc32k", "timerclk01", }; > > +static const char *timer2_mux_p[] __initdata = { "osc32k", "timerclk23", }; > > +static const char *timer3_mux_p[] __initdata = { "osc32k", "timerclk23", }; > > +static const char *timer4_mux_p[] __initdata = { "osc32k", "timerclk45", }; > > +static const char *timer5_mux_p[] __initdata = { "osc32k", "timerclk45", }; > > +static const char *timer6_mux_p[] __initdata = { "osc32k", "timerclk67", }; > > +static const char *timer7_mux_p[] __initdata = { "osc32k", "timerclk67", }; > > +static const char *timer8_mux_p[] __initdata = { "osc32k", "timerclk89", }; > > +static const char *timer9_mux_p[] __initdata = { "osc32k", "timerclk89", }; > > +static const char *uart0_mux_p[] __initdata = { "osc26m", "pclk", }; > > +static const char *uart1_mux_p[] __initdata = { "osc26m", "pclk", }; > > +static const char *uart2_mux_p[] __initdata = { "osc26m", "pclk", }; > > +static const char *uart3_mux_p[] __initdata = { "osc26m", "pclk", }; > > +static const char *uart4_mux_p[] __initdata = { "osc26m", "pclk", }; > > +static const char *spi0_mux_p[] __initdata = { "osc26m", "rclk_cfgaxi", }; > > +static const char *spi1_mux_p[] __initdata = { "osc26m", "rclk_cfgaxi", }; > > +static const char *spi2_mux_p[] __initdata = { "osc26m", "rclk_cfgaxi", }; > > /* share axi parent */ > > -static const char *saxi_mux_p[] __initconst = { "armpll3", "armpll2", }; > > -static const char *pwm0_mux_p[] __initconst = { "osc32k", "osc26m", }; > > -static const char *pwm1_mux_p[] __initconst = { "osc32k", "osc26m", }; > > -static const char *sd_mux_p[] __initconst = { "armpll2", "armpll3", }; > > -static const char *mmc1_mux_p[] __initconst = { "armpll2", "armpll3", }; > > -static const char *mmc1_mux2_p[] __initconst = { "osc26m", "mmc1_div", }; > > -static const char *g2d_mux_p[] __initconst = { "armpll2", "armpll3", }; > > -static const char *venc_mux_p[] __initconst = { "armpll2", "armpll3", }; > > -static const char *vdec_mux_p[] __initconst = { "armpll2", "armpll3", }; > > -static const char *vpp_mux_p[] __initconst = { "armpll2", "armpll3", }; > > -static const char *edc0_mux_p[] __initconst = { "armpll2", "armpll3", }; > > -static const char *ldi0_mux_p[] __initconst = { "armpll2", "armpll4", > > +static const char *saxi_mux_p[] __initdata = { "armpll3", "armpll2", }; > > +static const char *pwm0_mux_p[] __initdata = { "osc32k", "osc26m", }; > > +static const char *pwm1_mux_p[] __initdata = { "osc32k", "osc26m", }; > > +static const char *sd_mux_p[] __initdata = { "armpll2", "armpll3", }; > > +static const char *mmc1_mux_p[] __initdata = { "armpll2", "armpll3", }; > > +static const char *mmc1_mux2_p[] __initdata = { "osc26m", "mmc1_div", }; > > +static const char *g2d_mux_p[] __initdata = { "armpll2", "armpll3", }; > > +static const char *venc_mux_p[] __initdata = { "armpll2", "armpll3", }; > > +static const char *vdec_mux_p[] __initdata = { "armpll2", "armpll3", }; > > +static const char *vpp_mux_p[] __initdata = { "armpll2", "armpll3", }; > > +static const char *edc0_mux_p[] __initdata = { "armpll2", "armpll3", }; > > +static const char *ldi0_mux_p[] __initdata = { "armpll2", "armpll4", > > "armpll3", "armpll5", }; > > -static const char *edc1_mux_p[] __initconst = { "armpll2", "armpll3", }; > > -static const char *ldi1_mux_p[] __initconst = { "armpll2", "armpll4", > > +static const char *edc1_mux_p[] __initdata = { "armpll2", "armpll3", }; > > +static const char *ldi1_mux_p[] __initdata = { "armpll2", "armpll4", > > "armpll3", "armpll5", }; > > -static const char *rclk_hsic_p[] __initconst = { "armpll3", "armpll2", }; > > -static const char *mmc2_mux_p[] __initconst = { "armpll2", "armpll3", }; > > -static const char *mmc3_mux_p[] __initconst = { "armpll2", "armpll3", }; > > +static const char *rclk_hsic_p[] __initdata = { "armpll3", "armpll2", }; > > +static const char *mmc2_mux_p[] __initdata = { "armpll2", "armpll3", }; > > +static const char *mmc3_mux_p[] __initdata = { "armpll2", "armpll3", }; > > > > > > /* fixed rate clocks */ > > diff --git a/drivers/clk/hisilicon/clk-hix5hd2.c b/drivers/clk/hisilicon/clk-hix5hd2.c > > index 3f369c60fe56..f1d239435826 100644 > > --- a/drivers/clk/hisilicon/clk-hix5hd2.c > > +++ b/drivers/clk/hisilicon/clk-hix5hd2.c > > @@ -46,15 +46,15 @@ static struct hisi_fixed_rate_clock hix5hd2_fixed_rate_clks[] __initdata = { > > { HIX5HD2_FIXED_83M, "83m", NULL, CLK_IS_ROOT, 83333333, }, > > }; > > > > -static const char *sfc_mux_p[] __initconst = { > > +static const char *sfc_mux_p[] __initdata = { > > "24m", "150m", "200m", "100m", "75m", }; > > static u32 sfc_mux_table[] = {0, 4, 5, 6, 7}; > > > > -static const char *sdio_mux_p[] __initconst = { > > +static const char *sdio_mux_p[] __initdata = { > > "75m", "100m", "50m", "15m", }; > > static u32 sdio_mux_table[] = {0, 1, 2, 3}; > > > > -static const char *fephy_mux_p[] __initconst = { "25m", "125m"}; > > +static const char *fephy_mux_p[] __initdata = { "25m", "125m"}; > > static u32 fephy_mux_table[] = {0, 1}; > > > > > > diff --git a/drivers/clk/mxs/clk-imx23.c b/drivers/clk/mxs/clk-imx23.c > > index 9fc9359f5133..22d136aa699f 100644 > > --- a/drivers/clk/mxs/clk-imx23.c > > +++ b/drivers/clk/mxs/clk-imx23.c > > @@ -77,12 +77,12 @@ static void __init clk_misc_init(void) > > writel_relaxed(30 << BP_FRAC_IOFRAC, FRAC + SET); > > } > > > > -static const char *sel_pll[] __initconst = { "pll", "ref_xtal", }; > > -static const char *sel_cpu[] __initconst = { "ref_cpu", "ref_xtal", }; > > -static const char *sel_pix[] __initconst = { "ref_pix", "ref_xtal", }; > > -static const char *sel_io[] __initconst = { "ref_io", "ref_xtal", }; > > -static const char *cpu_sels[] __initconst = { "cpu_pll", "cpu_xtal", }; > > -static const char *emi_sels[] __initconst = { "emi_pll", "emi_xtal", }; > > +static const char *sel_pll[] __initdata = { "pll", "ref_xtal", }; > > +static const char *sel_cpu[] __initdata = { "ref_cpu", "ref_xtal", }; > > +static const char *sel_pix[] __initdata = { "ref_pix", "ref_xtal", }; > > +static const char *sel_io[] __initdata = { "ref_io", "ref_xtal", }; > > +static const char *cpu_sels[] __initdata = { "cpu_pll", "cpu_xtal", }; > > +static const char *emi_sels[] __initdata = { "emi_pll", "emi_xtal", }; > > > > enum imx23_clk { > > ref_xtal, pll, ref_cpu, ref_emi, ref_pix, ref_io, saif_sel, > > diff --git a/drivers/clk/mxs/clk-imx28.c b/drivers/clk/mxs/clk-imx28.c > > index a6c35010e4e5..b1be3746ce95 100644 > > --- a/drivers/clk/mxs/clk-imx28.c > > +++ b/drivers/clk/mxs/clk-imx28.c > > @@ -125,15 +125,15 @@ static void __init clk_misc_init(void) > > writel_relaxed(val, FRAC0); > > } > > > > -static const char *sel_cpu[] __initconst = { "ref_cpu", "ref_xtal", }; > > -static const char *sel_io0[] __initconst = { "ref_io0", "ref_xtal", }; > > -static const char *sel_io1[] __initconst = { "ref_io1", "ref_xtal", }; > > -static const char *sel_pix[] __initconst = { "ref_pix", "ref_xtal", }; > > -static const char *sel_gpmi[] __initconst = { "ref_gpmi", "ref_xtal", }; > > -static const char *sel_pll0[] __initconst = { "pll0", "ref_xtal", }; > > -static const char *cpu_sels[] __initconst = { "cpu_pll", "cpu_xtal", }; > > -static const char *emi_sels[] __initconst = { "emi_pll", "emi_xtal", }; > > -static const char *ptp_sels[] __initconst = { "ref_xtal", "pll0", }; > > +static const char *sel_cpu[] __initdata = { "ref_cpu", "ref_xtal", }; > > +static const char *sel_io0[] __initdata = { "ref_io0", "ref_xtal", }; > > +static const char *sel_io1[] __initdata = { "ref_io1", "ref_xtal", }; > > +static const char *sel_pix[] __initdata = { "ref_pix", "ref_xtal", }; > > +static const char *sel_gpmi[] __initdata = { "ref_gpmi", "ref_xtal", }; > > +static const char *sel_pll0[] __initdata = { "pll0", "ref_xtal", }; > > +static const char *cpu_sels[] __initdata = { "cpu_pll", "cpu_xtal", }; > > +static const char *emi_sels[] __initdata = { "emi_pll", "emi_xtal", }; > > +static const char *ptp_sels[] __initdata = { "ref_xtal", "pll0", }; > > > > enum imx28_clk { > > ref_xtal, pll0, pll1, pll2, ref_cpu, ref_emi, ref_io0, ref_io1, > > diff --git a/drivers/clk/pxa/clk-pxa.h b/drivers/clk/pxa/clk-pxa.h > > index 323965430111..b04c5b9c0ea8 100644 > > --- a/drivers/clk/pxa/clk-pxa.h > > +++ b/drivers/clk/pxa/clk-pxa.h > > @@ -14,7 +14,7 @@ > > #define _CLK_PXA_ > > > > #define PARENTS(name) \ > > - static const char *name ## _parents[] __initconst > > + static const char *name ## _parents[] __initdata > > #define MUX_RO_RATE_RO_OPS(name, clk_name) \ > > static struct clk_hw name ## _mux_hw; \ > > static struct clk_hw name ## _rate_hw; \ > > diff --git a/drivers/clk/rockchip/clk-rk3188.c b/drivers/clk/rockchip/clk-rk3188.c > > index 7eb684c50d42..556ce041d371 100644 > > --- a/drivers/clk/rockchip/clk-rk3188.c > > +++ b/drivers/clk/rockchip/clk-rk3188.c > > @@ -704,7 +704,7 @@ static struct rockchip_clk_branch rk3188_clk_branches[] __initdata = { > > GATE(ACLK_GPS, "aclk_gps", "aclk_peri", 0, RK2928_CLKGATE_CON(8), 13, GFLAGS), > > }; > > > > -static const char *rk3188_critical_clocks[] __initconst = { > > +static const char *const rk3188_critical_clocks[] __initconst = { > > "aclk_cpu", > > "aclk_peri", > > "hclk_peri", > > diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c > > index 11194b8329fe..434b42ccd7e7 100644 > > --- a/drivers/clk/rockchip/clk-rk3288.c > > +++ b/drivers/clk/rockchip/clk-rk3288.c > > @@ -771,7 +771,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = { > > GATE(0, "pclk_isp_in", "ext_isp", 0, RK3288_CLKGATE_CON(16), 3, GFLAGS), > > }; > > > > -static const char *rk3288_critical_clocks[] __initconst = { > > +static const char *const rk3288_critical_clocks[] __initconst = { > > "aclk_cpu", > > "aclk_peri", > > "hclk_peri", > > diff --git a/drivers/clk/rockchip/clk.c b/drivers/clk/rockchip/clk.c > > index 20e05bbb3a67..edb5d489ae61 100644 > > --- a/drivers/clk/rockchip/clk.c > > +++ b/drivers/clk/rockchip/clk.c > > @@ -317,7 +317,8 @@ void __init rockchip_clk_register_armclk(unsigned int lookup_id, > > rockchip_clk_add_lookup(clk, lookup_id); > > } > > > > -void __init rockchip_clk_protect_critical(const char *clocks[], int nclocks) > > +void __init rockchip_clk_protect_critical(const char *const clocks[], > > + int nclocks) > > { > > int i; > > > > diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h > > index 58d2e3bdf22f..e42fe095a9c0 100644 > > --- a/drivers/clk/rockchip/clk.h > > +++ b/drivers/clk/rockchip/clk.h > > @@ -182,7 +182,7 @@ struct clk *rockchip_clk_register_mmc(const char *name, > > const char **parent_names, u8 num_parents, > > void __iomem *reg, int shift); > > > > -#define PNAME(x) static const char *x[] __initconst > > +#define PNAME(x) static const char *x[] __initdata > > > > enum rockchip_clk_branch_type { > > branch_composite, > > diff --git a/drivers/clk/samsung/clk-s5pv210.c b/drivers/clk/samsung/clk-s5pv210.c > > index d270a2084644..e668e479a697 100644 > > --- a/drivers/clk/samsung/clk-s5pv210.c > > +++ b/drivers/clk/samsung/clk-s5pv210.c > > @@ -169,44 +169,44 @@ static inline void s5pv210_clk_sleep_init(void) { } > > #endif > > > > /* Mux parent lists. */ > > -static const char *fin_pll_p[] __initconst = { > > +static const char *fin_pll_p[] __initdata = { > > "xxti", > > "xusbxti" > > }; > > > > -static const char *mout_apll_p[] __initconst = { > > +static const char *mout_apll_p[] __initdata = { > > "fin_pll", > > "fout_apll" > > }; > > > > -static const char *mout_mpll_p[] __initconst = { > > +static const char *mout_mpll_p[] __initdata = { > > "fin_pll", > > "fout_mpll" > > }; > > > > -static const char *mout_epll_p[] __initconst = { > > +static const char *mout_epll_p[] __initdata = { > > "fin_pll", > > "fout_epll" > > }; > > > > -static const char *mout_vpllsrc_p[] __initconst = { > > +static const char *mout_vpllsrc_p[] __initdata = { > > "fin_pll", > > "sclk_hdmi27m" > > }; > > > > -static const char *mout_vpll_p[] __initconst = { > > +static const char *mout_vpll_p[] __initdata = { > > "mout_vpllsrc", > > "fout_vpll" > > }; > > > > -static const char *mout_group1_p[] __initconst = { > > +static const char *mout_group1_p[] __initdata = { > > "dout_a2m", > > "mout_mpll", > > "mout_epll", > > "mout_vpll" > > }; > > > > -static const char *mout_group2_p[] __initconst = { > > +static const char *mout_group2_p[] __initdata = { > > "xxti", > > "xusbxti", > > "sclk_hdmi27m", > > @@ -218,7 +218,7 @@ static const char *mout_group2_p[] __initconst = { > > "mout_vpll", > > }; > > > > -static const char *mout_audio0_p[] __initconst = { > > +static const char *mout_audio0_p[] __initdata = { > > "xxti", > > "pcmcdclk0", > > "sclk_hdmi27m", > > @@ -230,7 +230,7 @@ static const char *mout_audio0_p[] __initconst = { > > "mout_vpll", > > }; > > > > -static const char *mout_audio1_p[] __initconst = { > > +static const char *mout_audio1_p[] __initdata = { > > "i2scdclk1", > > "pcmcdclk1", > > "sclk_hdmi27m", > > @@ -242,7 +242,7 @@ static const char *mout_audio1_p[] __initconst = { > > "mout_vpll", > > }; > > > > -static const char *mout_audio2_p[] __initconst = { > > +static const char *mout_audio2_p[] __initdata = { > > "i2scdclk2", > > "pcmcdclk2", > > "sclk_hdmi27m", > > @@ -254,63 +254,63 @@ static const char *mout_audio2_p[] __initconst = { > > "mout_vpll", > > }; > > > > -static const char *mout_spdif_p[] __initconst = { > > +static const char *mout_spdif_p[] __initdata = { > > "dout_audio0", > > "dout_audio1", > > "dout_audio3", > > }; > > > > -static const char *mout_group3_p[] __initconst = { > > +static const char *mout_group3_p[] __initdata = { > > "mout_apll", > > "mout_mpll" > > }; > > > > -static const char *mout_group4_p[] __initconst = { > > +static const char *mout_group4_p[] __initdata = { > > "mout_mpll", > > "dout_a2m" > > }; > > > > -static const char *mout_flash_p[] __initconst = { > > +static const char *mout_flash_p[] __initdata = { > > "dout_hclkd", > > "dout_hclkp" > > }; > > > > -static const char *mout_dac_p[] __initconst = { > > +static const char *mout_dac_p[] __initdata = { > > "mout_vpll", > > "sclk_hdmiphy" > > }; > > > > -static const char *mout_hdmi_p[] __initconst = { > > +static const char *mout_hdmi_p[] __initdata = { > > "sclk_hdmiphy", > > "dout_tblk" > > }; > > > > -static const char *mout_mixer_p[] __initconst = { > > +static const char *mout_mixer_p[] __initdata = { > > "mout_dac", > > "mout_hdmi" > > }; > > > > -static const char *mout_vpll_6442_p[] __initconst = { > > +static const char *mout_vpll_6442_p[] __initdata = { > > "fin_pll", > > "fout_vpll" > > }; > > > > -static const char *mout_mixer_6442_p[] __initconst = { > > +static const char *mout_mixer_6442_p[] __initdata = { > > "mout_vpll", > > "dout_mixer" > > }; > > > > -static const char *mout_d0sync_6442_p[] __initconst = { > > +static const char *mout_d0sync_6442_p[] __initdata = { > > "mout_dsys", > > "div_apll" > > }; > > > > -static const char *mout_d1sync_6442_p[] __initconst = { > > +static const char *mout_d1sync_6442_p[] __initdata = { > > "mout_psys", > > "div_apll" > > }; > > > > -static const char *mout_group2_6442_p[] __initconst = { > > +static const char *mout_group2_6442_p[] __initdata = { > > "fin_pll", > > "none", > > "none", > > @@ -322,7 +322,7 @@ static const char *mout_group2_6442_p[] __initconst = { > > "mout_vpll", > > }; > > > > -static const char *mout_audio0_6442_p[] __initconst = { > > +static const char *mout_audio0_6442_p[] __initdata = { > > "fin_pll", > > "pcmcdclk0", > > "none", > > @@ -334,7 +334,7 @@ static const char *mout_audio0_6442_p[] __initconst = { > > "mout_vpll", > > }; > > > > -static const char *mout_audio1_6442_p[] __initconst = { > > +static const char *mout_audio1_6442_p[] __initdata = { > > "i2scdclk1", > > "pcmcdclk1", > > "none", > > @@ -347,7 +347,7 @@ static const char *mout_audio1_6442_p[] __initconst = { > > "fin_pll", > > }; > > > > -static const char *mout_clksel_p[] __initconst = { > > +static const char *mout_clksel_p[] __initdata = { > > "fout_apll_clkout", > > "fout_mpll_clkout", > > "fout_epll", > > @@ -370,7 +370,7 @@ static const char *mout_clksel_p[] __initconst = { > > "div_dclk" > > }; > > > > -static const char *mout_clksel_6442_p[] __initconst = { > > +static const char *mout_clksel_6442_p[] __initdata = { > > "fout_apll_clkout", > > "fout_mpll_clkout", > > "fout_epll", > > @@ -393,7 +393,7 @@ static const char *mout_clksel_6442_p[] __initconst = { > > "div_dclk" > > }; > > > > -static const char *mout_clkout_p[] __initconst = { > > +static const char *mout_clkout_p[] __initdata = { > > "dout_clkout", > > "none", > > "xxti", > > diff --git a/drivers/clk/ti/composite.c b/drivers/clk/ti/composite.c > > index 19d8980ba458..c429c65b5b21 100644 > > --- a/drivers/clk/ti/composite.c > > +++ b/drivers/clk/ti/composite.c > > @@ -67,7 +67,7 @@ struct component_clk { > > struct list_head link; > > }; > > > > -static const char * __initconst component_clk_types[] = { > > +static const char * const component_clk_types[] __initconst = { > > "gate", "divider", "mux" > > }; > > > > diff --git a/drivers/clk/zynq/clkc.c b/drivers/clk/zynq/clkc.c > > index 9037bebd69f7..5ac254f7e3b8 100644 > > --- a/drivers/clk/zynq/clkc.c > > +++ b/drivers/clk/zynq/clkc.c > > @@ -85,22 +85,22 @@ static DEFINE_SPINLOCK(canmioclk_lock); > > static DEFINE_SPINLOCK(dbgclk_lock); > > static DEFINE_SPINLOCK(aperclk_lock); > > > > -static const char *armpll_parents[] __initconst = {"armpll_int", "ps_clk"}; > > -static const char *ddrpll_parents[] __initconst = {"ddrpll_int", "ps_clk"}; > > -static const char *iopll_parents[] __initconst = {"iopll_int", "ps_clk"}; > > -static const char *gem0_mux_parents[] __initconst = {"gem0_div1", "dummy_name"}; > > -static const char *gem1_mux_parents[] __initconst = {"gem1_div1", "dummy_name"}; > > -static const char *can0_mio_mux2_parents[] __initconst = {"can0_gate", > > +static const char *armpll_parents[] __initdata = {"armpll_int", "ps_clk"}; > > +static const char *ddrpll_parents[] __initdata = {"ddrpll_int", "ps_clk"}; > > +static const char *iopll_parents[] __initdata = {"iopll_int", "ps_clk"}; > > +static const char *gem0_mux_parents[] __initdata = {"gem0_div1", "dummy_name"}; > > +static const char *gem1_mux_parents[] __initdata = {"gem1_div1", "dummy_name"}; > > +static const char *can0_mio_mux2_parents[] __initdata = {"can0_gate", > > "can0_mio_mux"}; > > -static const char *can1_mio_mux2_parents[] __initconst = {"can1_gate", > > +static const char *can1_mio_mux2_parents[] __initdata = {"can1_gate", > > "can1_mio_mux"}; > > -static const char *dbg_emio_mux_parents[] __initconst = {"dbg_div", > > +static const char *dbg_emio_mux_parents[] __initdata = {"dbg_div", > > "dummy_name"}; > > > > -static const char *dbgtrc_emio_input_names[] __initconst = {"trace_emio_clk"}; > > -static const char *gem0_emio_input_names[] __initconst = {"gem0_emio_clk"}; > > -static const char *gem1_emio_input_names[] __initconst = {"gem1_emio_clk"}; > > -static const char *swdt_ext_clk_input_names[] __initconst = {"swdt_ext_clk"}; > > +static const char *dbgtrc_emio_input_names[] __initdata = {"trace_emio_clk"}; > > +static const char *gem0_emio_input_names[] __initdata = {"gem0_emio_clk"}; > > +static const char *gem1_emio_input_names[] __initdata = {"gem1_emio_clk"}; > > +static const char *swdt_ext_clk_input_names[] __initdata = {"swdt_ext_clk"}; > > > > static void __init zynq_clk_register_fclk(enum zynq_clk fclk, > > const char *clk_name, void __iomem *fclk_ctrl_reg, > > -- > > 2.1.4 > > > > > > _______________________________________________ > > linux-arm-kernel mailing list > > linux-arm-kernel@lists.infradead.org > > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel > > -- > Pengutronix e.K. | Uwe Kleine-König | > Industrial Linux Solutions | http://www.pengutronix.de/ | diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h index e42fe09..e63cafe 100644 --- a/drivers/clk/rockchip/clk.h +++ b/drivers/clk/rockchip/clk.h @@ -407,7 +407,7 @@ void rockchip_clk_register_armclk(unsigned int lookup_id, const char *name, const struct rockchip_cpuclk_reg_data *reg_data, const struct rockchip_cpuclk_rate_table *rates, int nrates); -void rockchip_clk_protect_critical(const char *clocks[], int nclocks); +void rockchip_clk_protect_critical(const char *const clocks[], int nclocks); void rockchip_register_restart_notifier(unsigned int reg); #define ROCKCHIP_SOFTRST_HIWORD_MASK BIT(0)