From patchwork Mon Sep 1 11:42:38 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Will Deacon X-Patchwork-Id: 36347 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-pd0-f198.google.com (mail-pd0-f198.google.com [209.85.192.198]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 205F120792 for ; Mon, 1 Sep 2014 11:45:11 +0000 (UTC) Received: by mail-pd0-f198.google.com with SMTP id fp1sf30222370pdb.1 for ; Mon, 01 Sep 2014 04:45:10 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:date:from:to:cc:subject:message-id :references:mime-version:in-reply-to:user-agent:sender:precedence :list-id:x-original-sender:x-original-authentication-results :mailing-list:list-post:list-help:list-archive:list-unsubscribe :content-type:content-disposition; bh=OQYNqo4UcKxWO5+R1dqSdREg4LzisKz+6kiYGau/idM=; b=BnFvhf35/CnO1yRcphB9FkYNfFFfU0nMgqmcMdwY8w5jjeDrWJrYp3Fd7QHfDJnlCJ cboKmdBApkOrgn5O0N1F/gvaxVn7UR57y57ianBTK2QEJTUgoYe/KjG1aHj/x7a5TB3a ULGbMrnTALX0JUa8hJtKrI8gLaUH24gGrGPlZuwOxXajjOUUX50RrxGmAGYqaFoY30Ny itOsj8czLBV9XLpV07+7g3XrkmW0rp1OYjMiDnzC7AKMaL0wBTjdyRb6aZXHdg/P2kx6 x2HV3RPjkk1qpnyWzB4xqoK35AA4VdhD9EHrG1Tj2Y6A46NbhCtgw+fFJObGs+kjLdbw F6fQ== X-Gm-Message-State: ALoCoQmqMidCjLI0UM4E6fKW8f2fVPInrEs9ijnyQDC20JR1M/KnExrdXHUeaEytedW5c7CDj3aV X-Received: by 10.66.155.194 with SMTP id vy2mr15443239pab.19.1409571910286; Mon, 01 Sep 2014 04:45:10 -0700 (PDT) X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.100.180 with SMTP id s49ls1758688qge.42.gmail; Mon, 01 Sep 2014 04:45:10 -0700 (PDT) X-Received: by 10.52.238.227 with SMTP id vn3mr76501vdc.47.1409571910138; Mon, 01 Sep 2014 04:45:10 -0700 (PDT) Received: from mail-vc0-f170.google.com (mail-vc0-f170.google.com [209.85.220.170]) by mx.google.com with ESMTPS id 20si209830vcd.22.2014.09.01.04.45.10 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 01 Sep 2014 04:45:10 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.170 as permitted sender) client-ip=209.85.220.170; Received: by mail-vc0-f170.google.com with SMTP id la4so5438749vcb.1 for ; Mon, 01 Sep 2014 04:45:10 -0700 (PDT) X-Received: by 10.220.187.134 with SMTP id cw6mr30437vcb.71.1409571910049; Mon, 01 Sep 2014 04:45:10 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.221.45.67 with SMTP id uj3csp375057vcb; Mon, 1 Sep 2014 04:45:09 -0700 (PDT) X-Received: by 10.70.47.2 with SMTP id z2mr39382187pdm.38.1409571908799; Mon, 01 Sep 2014 04:45:08 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id ml3si718006pab.203.2014.09.01.04.45.08 for ; Mon, 01 Sep 2014 04:45:08 -0700 (PDT) Received-SPF: none (google.com: devicetree-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753133AbaIALpH (ORCPT + 5 others); Mon, 1 Sep 2014 07:45:07 -0400 Received: from cam-admin0.cambridge.arm.com ([217.140.96.50]:61738 "EHLO cam-admin0.cambridge.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752997AbaIALpG (ORCPT ); Mon, 1 Sep 2014 07:45:06 -0400 Received: from arm.com (edgewater-inn.cambridge.arm.com [10.1.203.34]) by cam-admin0.cambridge.arm.com (8.12.6/8.12.6) with ESMTP id s81BgFwo010441; Mon, 1 Sep 2014 12:42:15 +0100 (BST) Date: Mon, 1 Sep 2014 12:42:38 +0100 From: Will Deacon To: "c.tirumalesh@gmail.com" Cc: "linux-arm-kernel@lists.infradead.org" , "iommu@lists.linux-foundation.org" , "devicetree@vger.kernel.org" , "tchalamarla@caviumnetworks.com" , "Prasun.Kapoor@caviumnetworks.com" , Tirumalesh Chalamarla Subject: Re: [PATCH] iommu/arm-smmu: Allow size of stage 1 output to max possible value for sateg 2 bypass Message-ID: <20140901114238.GB24594@arm.com> References: <1409162541-3940-1-git-send-email-c.tirumalesh@gmail.com> MIME-Version: 1.0 In-Reply-To: <1409162541-3940-1-git-send-email-c.tirumalesh@gmail.com> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: devicetree-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: devicetree@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: will.deacon@arm.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.170 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Content-Disposition: inline Hi Tirumalesh, On Wed, Aug 27, 2014 at 07:02:21PM +0100, c.tirumalesh@gmail.com wrote: > From: Tirumalesh Chalamarla > > This patch modifes output_mask calculation logic for stage 1 and allow > max possible value supported by SMMU implementaions for translations, > where stage 2 is bypassed. > > Erlier it is not possible to access full supported PA address with stage 1, > even if it is supported by SMMU and stage 2 is bypass. I'm trying to understand what you're getting at here. Essentially, you want to use the full stage-1 output range for a stage-1 only MMU, right? The code is currently structured to truncate that to the stage-2 input size for nested translation. However, I think that's better solved by faking the ID registers in the virtual SMMU instead of posing these restrictions on the host as well. Assuming I understand the problem correctly, why not simply remove the truncation from the existing code (untested patch below)? Does that not work for you? Will --->8 --- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index 2b1271658bfa..a02d05793a73 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -1917,21 +1917,7 @@ static int arm_smmu_device_cfg_probe(struct arm_smmu_device *smmu) /* ID2 */ id = readl_relaxed(gr0_base + ARM_SMMU_GR0_ID2); size = arm_smmu_id_size_to_bits((id >> ID2_IAS_SHIFT) & ID2_IAS_MASK); - - /* - * Stage-1 output limited by stage-2 input size due to pgd - * allocation (PTRS_PER_PGD). - */ - if (smmu->features & ARM_SMMU_FEAT_TRANS_NESTED) { -#ifdef CONFIG_64BIT - smmu->s1_output_size = min_t(unsigned long, VA_BITS, size); -#else - smmu->s1_output_size = min(32UL, size); -#endif - } else { - smmu->s1_output_size = min_t(unsigned long, PHYS_MASK_SHIFT, - size); - } + smmu->s1_output_size = min_t(unsigned long, PHYS_MASK_SHIFT, size); /* The stage-2 output mask is also applied for bypass */ size = arm_smmu_id_size_to_bits((id >> ID2_OAS_SHIFT) & ID2_OAS_MASK);