From patchwork Tue Mar 15 19:57:34 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Green X-Patchwork-Id: 604 Return-Path: Delivered-To: unknown Received: from imap.gmail.com (74.125.159.109) by localhost6.localdomain6 with IMAP4-SSL; 08 Jun 2011 14:44:04 -0000 Delivered-To: patches@linaro.org Received: by 10.151.46.5 with SMTP id y5cs80518ybj; Tue, 15 Mar 2011 12:57:38 -0700 (PDT) Received: by 10.227.169.2 with SMTP id w2mr12935443wby.77.1300219057729; Tue, 15 Mar 2011 12:57:37 -0700 (PDT) Received: from mail-ww0-f50.google.com (mail-ww0-f50.google.com [74.125.82.50]) by mx.google.com with ESMTPS id x20si329091wbd.10.2011.03.15.12.57.36 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 15 Mar 2011 12:57:37 -0700 (PDT) Received-SPF: pass (google.com: domain of andy.warmcat.com@googlemail.com designates 74.125.82.50 as permitted sender) client-ip=74.125.82.50; Authentication-Results: mx.google.com; spf=pass (google.com: domain of andy.warmcat.com@googlemail.com designates 74.125.82.50 as permitted sender) smtp.mail=andy.warmcat.com@googlemail.com; dkim=pass (test mode) header.i=@googlemail.com Received: by mail-ww0-f50.google.com with SMTP id 33so1213249wwc.31 for ; Tue, 15 Mar 2011 12:57:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=gamma; h=domainkey-signature:sender:from:subject:to:cc:date:message-id :in-reply-to:references:user-agent:mime-version:content-type :content-transfer-encoding; bh=O01/9fSvRdnQqFLXXZqO3XTIS2Ro/WgHvbWx6IhJei8=; b=lk/30ISzlc/MCjs/QqrDSMfK9vs+nDT16SQie+EsbbXfejuoBA48FDRDd5XubhdQtK 8xpjg+Jxzl3YmxWr0ldHBVfw3il3508WertDK+VMQLcVwAbhAUAtoez4Vkm4Re8bR57Y 1iy/vw2R44OBH77jbteie8kVxae2+Fre+F8eM= DomainKey-Signature: a=rsa-sha1; c=nofws; d=googlemail.com; s=gamma; h=sender:from:subject:to:cc:date:message-id:in-reply-to:references :user-agent:mime-version:content-type:content-transfer-encoding; b=TY6u/utGvFPZRNCqvy6dFJ5Y0LcFulnPYYaSbSQyHGGJ4f6jaiKZ0xVVhDbwy7r0mx sq3yjX2th1mkUJmyWkOK0cs/8Mje6YjdV/CynG1MJZTHGO97R+zPRrVHBbdAH4szzSuk YxQiMjoNHnZGX+hVLMKXpa8Px8QRKHLnlXlLM= Received: by 10.216.72.201 with SMTP id t51mr4111665wed.6.1300219056874; Tue, 15 Mar 2011 12:57:36 -0700 (PDT) Received: from otae.warmcat.com (s15404224.onlinehome-server.info [87.106.134.80]) by mx.google.com with ESMTPS id h39sm113003wes.5.2011.03.15.12.57.35 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 15 Mar 2011 12:57:36 -0700 (PDT) Sender: Andy Green From: Andy Green Subject: [PATCH 3 14/18] I2C: OMAP1/OMAP2+: create omap I2C functionality flags for each cpu_... test To: linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org Cc: patches@linaro.org, Ben Dooks , Andy Green Date: Tue, 15 Mar 2011 19:57:34 +0000 Message-ID: <20110315195734.30000.12009.stgit@otae.warmcat.com> In-Reply-To: <20110315195147.30000.86184.stgit@otae.warmcat.com> References: <20110315195147.30000.86184.stgit@otae.warmcat.com> User-Agent: StGIT/0.14.3 MIME-Version: 1.0 These represent the 8 kinds of implementation functionality that up until now were inferred by the 16 remaining cpu_...() tests in the omap i2c driver. Changed to use BIT() as suggested by Balaji T Krishnamoorthy. Cc: patches@linaro.org Cc: Ben Dooks Reported-by: Peter Maydell Signed-off-by: Andy Green --- include/linux/i2c-omap.h | 15 +++++++++++++++ 1 files changed, 15 insertions(+), 0 deletions(-) diff --git a/include/linux/i2c-omap.h b/include/linux/i2c-omap.h index 776c8e1..56a9924 100644 --- a/include/linux/i2c-omap.h +++ b/include/linux/i2c-omap.h @@ -15,6 +15,21 @@ #define OMAP_I2C_IP_VERSION_1 1 #define OMAP_I2C_IP_VERSION_2 2 +/* struct omap_i2c_bus_platform_data .flags meanings */ + +#define OMAP_I2C_FLAG_NO_FIFO BIT(0) +#define OMAP_I2C_FLAG_SIMPLE_CLOCK BIT(1) +#define OMAP_I2C_FLAG_16BIT_DATA_REG BIT(2) +#define OMAP_I2C_FLAG_RESET_REGS_POSTIDLE BIT(3) +#define OMAP_I2C_FLAG_APPLY_ERRATA_I207 BIT(4) +#define OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK BIT(5) +#define OMAP_I2C_FLAG_FORCE_19200_INT_CLK BIT(6) +/* how the CPU address bus must be translated for I2C unit access */ +#define OMAP_I2C_FLAG_BUS_SHIFT_NONE 0 +#define OMAP_I2C_FLAG_BUS_SHIFT_1 BIT(7) +#define OMAP_I2C_FLAG_BUS_SHIFT_2 BIT(8) +#define OMAP_I2C_FLAG_BUS_SHIFT__SHIFT 7 + struct omap_i2c_bus_platform_data { u32 clkrate; u32 rev;