From patchwork Tue Mar 15 19:56:56 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Green X-Patchwork-Id: 600 Return-Path: Delivered-To: unknown Received: from imap.gmail.com (74.125.159.109) by localhost6.localdomain6 with IMAP4-SSL; 08 Jun 2011 14:44:03 -0000 Delivered-To: patches@linaro.org Received: by 10.151.46.5 with SMTP id y5cs80508ybj; Tue, 15 Mar 2011 12:57:01 -0700 (PDT) Received: by 10.216.62.77 with SMTP id x55mr1382243wec.59.1300219020903; Tue, 15 Mar 2011 12:57:00 -0700 (PDT) Received: from mail-wy0-f178.google.com (mail-wy0-f178.google.com [74.125.82.178]) by mx.google.com with ESMTPS id c39si257994wek.202.2011.03.15.12.56.59 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 15 Mar 2011 12:56:59 -0700 (PDT) Received-SPF: pass (google.com: domain of andy.warmcat.com@googlemail.com designates 74.125.82.178 as permitted sender) client-ip=74.125.82.178; Authentication-Results: mx.google.com; spf=pass (google.com: domain of andy.warmcat.com@googlemail.com designates 74.125.82.178 as permitted sender) smtp.mail=andy.warmcat.com@googlemail.com; dkim=pass (test mode) header.i=@googlemail.com Received: by wyj26 with SMTP id 26so1069271wyj.37 for ; Tue, 15 Mar 2011 12:56:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=gamma; h=domainkey-signature:sender:from:subject:to:cc:date:message-id :in-reply-to:references:user-agent:mime-version:content-type :content-transfer-encoding; bh=AoFCbVShV1oRm6TNVlYU1/qM5LV3GSQzFtqGw3RzcXY=; b=Hq/gGAneWz8L4wyX+ttMlHHNybecdknGlOO8BJuecPfjtds+OAegpB6pMpX2BzPJ1K XvasBn5KY8YUY8iy8MqwrIa6anXUyKGSov1PyiymITQHMVw/cMAiogZ0CoKVJsSKlUSD OKC7dmMZgJTWhdUIT9MBYUYaCP61vw5DPqV1E= DomainKey-Signature: a=rsa-sha1; c=nofws; d=googlemail.com; s=gamma; h=sender:from:subject:to:cc:date:message-id:in-reply-to:references :user-agent:mime-version:content-type:content-transfer-encoding; b=KO0LmFPiG2bxSiCN5DtxB63XBVeZVX2f8szMgDvI94+cOOobrO/JaOlcpuqLSBaXRq cTuef/GPLPjggzOC2BKs5BI494BpR0q+tCinDUZhGdOB//ac5+svjrCwPXbnGxQWgqve ywirgrF+VJ2jd50+VCgpfE2SimUiYSgs2TeTQ= Received: by 10.216.243.195 with SMTP id k45mr4400310wer.66.1300219019078; Tue, 15 Mar 2011 12:56:59 -0700 (PDT) Received: from otae.warmcat.com (s15404224.onlinehome-server.info [87.106.134.80]) by mx.google.com with ESMTPS id g32sm113403wej.3.2011.03.15.12.56.57 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 15 Mar 2011 12:56:58 -0700 (PDT) Sender: Andy Green From: Andy Green Subject: [PATCH 3 09/18] I2C: OMAP2+: Solve array bounds overflow error on i2c idle To: linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org Cc: patches@linaro.org, Ben Dooks , Andy Green Date: Tue, 15 Mar 2011 19:56:56 +0000 Message-ID: <20110315195656.30000.17732.stgit@otae.warmcat.com> In-Reply-To: <20110315195147.30000.86184.stgit@otae.warmcat.com> References: <20110315195147.30000.86184.stgit@otae.warmcat.com> User-Agent: StGIT/0.14.3 MIME-Version: 1.0 This solves the main problem the patch series is about. Prior to this patch on OMAP3530 the driver wrongly interprets the I2C peripheral unit's own reported revision as meaning it is running on an IP V2 device and must use the extended registers. In fact OMAP3530 is IP V1 with the smaller register set, the reason for the confusion is that the hardware does in fact report having the same IP revision index as is found on an OMAP4430, which really is IP V2 and has the extended registers. This corrects the test for which registers to use so that it decides using hwmod knowledge found in the platform_data. Cc: patches@linaro.org Cc: Ben Dooks Reported-by: Peter Maydell Signed-off-by: Andy Green --- drivers/i2c/busses/i2c-omap.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c index eee0bb8..14f5b50 100644 --- a/drivers/i2c/busses/i2c-omap.c +++ b/drivers/i2c/busses/i2c-omap.c @@ -309,7 +309,7 @@ static void omap_i2c_idle(struct omap_i2c_dev *dev) pdata = pdev->dev.platform_data; dev->iestate = omap_i2c_read_reg(dev, OMAP_I2C_IE_REG); - if (dev->rev >= OMAP_I2C_REV_ON_4430) + if (pdata->rev == OMAP_I2C_IP_VERSION_2) omap_i2c_write_reg(dev, OMAP_I2C_IP_V2_IRQENABLE_CLR, 1); else omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, 0);