From patchwork Tue Mar 8 11:09:27 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Green X-Patchwork-Id: 437 Return-Path: Delivered-To: unknown Received: from imap.gmail.com (74.125.159.109) by localhost6.localdomain6 with IMAP4-SSL; 08 Jun 2011 14:42:39 -0000 Delivered-To: patches@linaro.org Received: by 10.224.60.68 with SMTP id o4cs23981qah; Tue, 8 Mar 2011 03:09:32 -0800 (PST) Received: by 10.213.107.82 with SMTP id a18mr3494303ebp.49.1299582571444; Tue, 08 Mar 2011 03:09:31 -0800 (PST) Received: from mail-ey0-f178.google.com (mail-ey0-f178.google.com [209.85.215.178]) by mx.google.com with ESMTPS id t3si1350465eeh.56.2011.03.08.03.09.29 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 08 Mar 2011 03:09:30 -0800 (PST) Received-SPF: pass (google.com: domain of andy.warmcat.com@googlemail.com designates 209.85.215.178 as permitted sender) client-ip=209.85.215.178; Authentication-Results: mx.google.com; spf=pass (google.com: domain of andy.warmcat.com@googlemail.com designates 209.85.215.178 as permitted sender) smtp.mail=andy.warmcat.com@googlemail.com; dkim=pass (test mode) header.i=@googlemail.com Received: by eya25 with SMTP id 25so2180740eya.37 for ; Tue, 08 Mar 2011 03:09:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=gamma; h=domainkey-signature:sender:from:subject:to:cc:date:message-id :in-reply-to:references:user-agent:mime-version:content-type :content-transfer-encoding; bh=Vsk+3FmG9xJ6QLYjRzK5uteIMc2sXhrKIsLWuL+zGEU=; b=lbDw0DJgr8GmxoKjRjfRZibFhXjHYdzfujGRSyRAIJtYHT2tYJrA3NzaR4yU4j/QU8 v2h8KvAWE065jkvVxDSiYNOl3St61cpe130fdMKGHvAnspez+hMMPS6J+LmQajRSzG6N cAn2P3dJrw4QKAPlpAYf156mZ7JdSQmChM/JE= DomainKey-Signature: a=rsa-sha1; c=nofws; d=googlemail.com; s=gamma; h=sender:from:subject:to:cc:date:message-id:in-reply-to:references :user-agent:mime-version:content-type:content-transfer-encoding; b=KqH6QLxts0zqOmOrA7ER2Fc72bwccPNe++7oq6aV5R4jtdBAZo6ihCSVYkuELvlRU2 9odp/k4311TRsGxg7nvNUpEX+Xt8AwxeTvGyOukiw0GyWUyYdyhtPX5t7+kxPbq/HL9e bxtRpetMjT7YW2JIbt+iJQK6P/RrT80MJwa6I= Received: by 10.216.160.1 with SMTP id t1mr3322963wek.2.1299582569290; Tue, 08 Mar 2011 03:09:29 -0800 (PST) Received: from otae.warmcat.com (s15404224.onlinehome-server.info [87.106.134.80]) by mx.google.com with ESMTPS id n18sm252440wee.16.2011.03.08.03.09.28 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 08 Mar 2011 03:09:29 -0800 (PST) Sender: Andy Green From: Andy Green Subject: [PATCH 2 17/18] I2C: OMAP2+: Convert omap I2C driver to use feature implementation flags from platform data To: linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org Cc: patches@linaro.org, Ben Dooks , Andy Green Date: Tue, 08 Mar 2011 11:09:27 +0000 Message-ID: <20110308110927.23531.12150.stgit@otae.warmcat.com> In-Reply-To: <20110308105934.23531.83540.stgit@otae.warmcat.com> References: <20110308105934.23531.83540.stgit@otae.warmcat.com> User-Agent: StGIT/0.14.3 MIME-Version: 1.0 This patch eliminates all cpu_...() tests from the OMAP I2C driver. Instead, it uses the functionality flags in the platform data to make the decisions about product variations the driver needs to handle. Cc: patches@linaro.org Cc: Ben Dooks Reported-by: Peter Maydell Signed-off-by: Andy Green --- drivers/i2c/busses/i2c-omap.c | 40 +++++++++++++++++++++++----------------- 1 files changed, 23 insertions(+), 17 deletions(-) diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c index ecb48c7..c997c55 100644 --- a/drivers/i2c/busses/i2c-omap.c +++ b/drivers/i2c/busses/i2c-omap.c @@ -277,7 +277,7 @@ static void omap_i2c_unidle(struct omap_i2c_dev *dev) pm_runtime_get_sync(&pdev->dev); - if (cpu_is_omap34xx()) { + if (pdata->flags & OMAP_I2C_FLAG_RESET_REGS_POSTIDLE) { omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0); omap_i2c_write_reg(dev, OMAP_I2C_PSC_REG, dev->pscstate); omap_i2c_write_reg(dev, OMAP_I2C_SCLL_REG, dev->scllstate); @@ -335,6 +335,11 @@ static int omap_i2c_init(struct omap_i2c_dev *dev) unsigned long timeout; unsigned long internal_clk = 0; struct clk *fclk; + struct platform_device *pdev; + struct omap_i2c_bus_platform_data *pdata; + + pdev = to_platform_device(dev->dev); + pdata = pdev->dev.platform_data; if (dev->rev >= OMAP_I2C_OMAP1_REV_2) { /* Disable I2C controller before soft reset */ @@ -386,7 +391,7 @@ static int omap_i2c_init(struct omap_i2c_dev *dev) } omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0); - if (cpu_class_is_omap1()) { + if (pdata->flags & OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK) { /* * The I2C functional clock is the armxor_ck, so there's * no need to get "armxor_ck" separately. Now, if OMAP2420 @@ -410,7 +415,7 @@ static int omap_i2c_init(struct omap_i2c_dev *dev) psc = fclk_rate / 12000000; } - if (!(cpu_class_is_omap1() || cpu_is_omap2420())) { + if (!(pdata->flags & OMAP_I2C_FLAG_SIMPLE_CLOCK)) { /* * HSI2C controller internal clk rate should be 19.2 Mhz for @@ -418,7 +423,8 @@ static int omap_i2c_init(struct omap_i2c_dev *dev) * to get longer filter period for better noise suppression. * The filter is iclk (fclk for HS) period. */ - if (dev->speed > 400 || cpu_is_omap2430()) + if (dev->speed > 400 || + pdata->flags & OMAP_I2C_FLAG_FORCE_19200_INT_CLK) internal_clk = 19200; else if (dev->speed > 100) internal_clk = 9600; @@ -487,7 +493,7 @@ static int omap_i2c_init(struct omap_i2c_dev *dev) dev->errata = 0; - if (cpu_is_omap2430() || cpu_is_omap34xx()) + if (pdata->flags & OMAP_I2C_FLAG_APPLY_ERRATA_I207) dev->errata |= I2C_OMAP_ERRATA_I207; /* Enable interrupts */ @@ -496,7 +502,7 @@ static int omap_i2c_init(struct omap_i2c_dev *dev) OMAP_I2C_IE_AL) | ((dev->fifo_size) ? (OMAP_I2C_IE_RDR | OMAP_I2C_IE_XDR) : 0); omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, dev->iestate); - if (cpu_is_omap34xx()) { + if (pdata->flags & OMAP_I2C_FLAG_RESET_REGS_POSTIDLE) { dev->pscstate = psc; dev->scllstate = scll; dev->sclhstate = sclh; @@ -816,6 +822,11 @@ omap_i2c_isr(int this_irq, void *dev_id) u16 bits; u16 stat, w; int err, count = 0; + struct platform_device *pdev; + struct omap_i2c_bus_platform_data *pdata; + + pdev = to_platform_device(dev->dev); + pdata = pdev->dev.platform_data; if (dev->idle) return IRQ_NONE; @@ -884,8 +895,8 @@ complete: * Data reg in 2430, omap3 and * omap4 is 8 bit wide */ - if (cpu_class_is_omap1() || - cpu_is_omap2420()) { + if (pdata->flags & + OMAP_I2C_FLAG_16BIT_DATA_REG) { if (dev->buf_len) { *dev->buf++ = w >> 8; dev->buf_len--; @@ -927,8 +938,8 @@ complete: * Data reg in 2430, omap3 and * omap4 is 8 bit wide */ - if (cpu_class_is_omap1() || - cpu_is_omap2420()) { + if (pdata->flags & + OMAP_I2C_FLAG_16BIT_DATA_REG) { if (dev->buf_len) { w |= *dev->buf++ << 8; dev->buf_len--; @@ -1030,12 +1041,7 @@ omap_i2c_probe(struct platform_device *pdev) platform_set_drvdata(pdev, dev); - if (cpu_is_omap7xx()) - dev->reg_shift = 1; - else if (cpu_is_omap44xx()) - dev->reg_shift = 0; - else - dev->reg_shift = 2; + dev->reg_shift = (pdata->flags >> OMAP_I2C_FLAG_BUS_SHIFT__SHIFT) & 3; if (pdata->rev == OMAP_I2C_IP_VERSION_2) dev->regs = (u8 *)reg_map_ip_v2; @@ -1050,7 +1056,7 @@ omap_i2c_probe(struct platform_device *pdev) if (dev->rev <= OMAP_I2C_REV_ON_3430) dev->errata |= I2C_OMAP3_1P153; - if (!(cpu_class_is_omap1() || cpu_is_omap2420())) { + if (!(pdata->flags & OMAP_I2C_FLAG_NO_FIFO)) { u16 s; /* Set up the fifo size - Get total size */