From patchwork Tue Mar 8 11:08:57 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Green X-Patchwork-Id: 435 Return-Path: Delivered-To: unknown Received: from imap.gmail.com (74.125.159.109) by localhost6.localdomain6 with IMAP4-SSL; 08 Jun 2011 14:42:38 -0000 Delivered-To: patches@linaro.org Received: by 10.224.60.68 with SMTP id o4cs23965qah; Tue, 8 Mar 2011 03:09:02 -0800 (PST) Received: by 10.213.99.199 with SMTP id v7mr3450798ebn.44.1299582541821; Tue, 08 Mar 2011 03:09:01 -0800 (PST) Received: from mail-ew0-f50.google.com (mail-ew0-f50.google.com [209.85.215.50]) by mx.google.com with ESMTPS id w3si1348013eeh.62.2011.03.08.03.08.59 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 08 Mar 2011 03:09:00 -0800 (PST) Received-SPF: pass (google.com: domain of andy.warmcat.com@googlemail.com designates 209.85.215.50 as permitted sender) client-ip=209.85.215.50; Authentication-Results: mx.google.com; spf=pass (google.com: domain of andy.warmcat.com@googlemail.com designates 209.85.215.50 as permitted sender) smtp.mail=andy.warmcat.com@googlemail.com; dkim=pass (test mode) header.i=@googlemail.com Received: by ewy26 with SMTP id 26so2185825ewy.37 for ; Tue, 08 Mar 2011 03:08:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=gamma; h=domainkey-signature:sender:from:subject:to:cc:date:message-id :in-reply-to:references:user-agent:mime-version:content-type :content-transfer-encoding; bh=ijOdGzUMjoIdukOf6WjQAjq93wCbAvYGqMF0qHlZU+g=; b=uq3wOyRDwHpZH8PE6pikNaDwmWJKPPZXVzQzOhNts2+7pDKi9rXieWlB8BkAZBG2DS BvRzJQ6CVIuTYPBsAERvwLUIauYvglaRcaVTgaIMLifZY+cFqu5jRJQ8x/x5vceCt52t xMiM/y1jkFkQBQtCTCmn6JizyrrqI8jAJ96qQ= DomainKey-Signature: a=rsa-sha1; c=nofws; d=googlemail.com; s=gamma; h=sender:from:subject:to:cc:date:message-id:in-reply-to:references :user-agent:mime-version:content-type:content-transfer-encoding; b=mW2hppDqKymf4lr3egwfMeoCdp9Yy6tPeVj6sckvDDNvpb9mQbgw6vv6qsU34Xk7Ns 7B8Vw76jnaut9F3jFA7k2iC/IzSn8NnNqOx5aJJi16/e7NDSxTE04X1ML3QRjXzbqz3d MtCPNT+jmAhvky1fGvkRpIrVySn5WaaS0TSDs= Received: by 10.216.80.89 with SMTP id j67mr4354943wee.20.1299582539656; Tue, 08 Mar 2011 03:08:59 -0800 (PST) Received: from otae.warmcat.com (s15404224.onlinehome-server.info [87.106.134.80]) by mx.google.com with ESMTPS id n4sm253676wee.4.2011.03.08.03.08.58 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 08 Mar 2011 03:08:59 -0800 (PST) Sender: Andy Green From: Andy Green Subject: [PATCH 2 13/18] I2C: OMAP2+: Pass flags up to omap i2c platform_data as well To: linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org Cc: patches@linaro.org, Ben Dooks , Andy Green Date: Tue, 08 Mar 2011 11:08:57 +0000 Message-ID: <20110308110857.23531.35956.stgit@otae.warmcat.com> In-Reply-To: <20110308105934.23531.83540.stgit@otae.warmcat.com> References: <20110308105934.23531.83540.stgit@otae.warmcat.com> User-Agent: StGIT/0.14.3 MIME-Version: 1.0 This is how the driver can find the flags for its implementation functionality in its platform_data Cc: patches@linaro.org Cc: Ben Dooks Reported-by: Peter Maydell Signed-off-by: Andy Green --- arch/arm/plat-omap/i2c.c | 7 ++++++- 1 files changed, 6 insertions(+), 1 deletions(-) diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c index 0d3eda7..9098669 100644 --- a/arch/arm/plat-omap/i2c.c +++ b/arch/arm/plat-omap/i2c.c @@ -141,6 +141,7 @@ static inline int omap2_i2c_add_bus(int bus_id) struct omap_device *od; char oh_name[MAX_OMAP_I2C_HWMOD_NAME_LEN]; struct omap_i2c_bus_platform_data *pdata; + struct omap_i2c_dev_attr *dev_attr; omap2_i2c_mux_pins(bus_id); @@ -156,10 +157,14 @@ static inline int omap2_i2c_add_bus(int bus_id) pdata = &i2c_pdata[bus_id - 1]; /* * pass the hwmod class's CPU-specific knowledge of I2C IP revision in - * use up to the OMAP I2C driver via platform data + * use, and functionality implementation flags, up to the OMAP I2C + * driver via platform data */ pdata->rev = oh->class->rev; + dev_attr = (struct omap_i2c_dev_attr *)oh->dev_attr; + pdata->flags = dev_attr->flags; + /* * When waiting for completion of a i2c transfer, we need to * set a wake up latency constraint for the MPU. This is to