From patchwork Thu Mar 3 13:50:44 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Green X-Patchwork-Id: 303 Return-Path: Delivered-To: unknown Received: from imap.gmail.com (74.125.159.109) by localhost6.localdomain6 with IMAP4-SSL; 08 Jun 2011 14:41:33 -0000 Delivered-To: patches@linaro.org Received: by 10.224.19.208 with SMTP id c16cs243601qab; Thu, 3 Mar 2011 05:50:48 -0800 (PST) Received: by 10.227.167.65 with SMTP id p1mr933815wby.118.1299160247588; Thu, 03 Mar 2011 05:50:47 -0800 (PST) Received: from mail-wy0-f178.google.com (mail-wy0-f178.google.com [74.125.82.178]) by mx.google.com with ESMTPS id j7si2106667wbc.19.2011.03.03.05.50.46 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 03 Mar 2011 05:50:47 -0800 (PST) Received-SPF: pass (google.com: domain of andy.warmcat.com@googlemail.com designates 74.125.82.178 as permitted sender) client-ip=74.125.82.178; Authentication-Results: mx.google.com; spf=pass (google.com: domain of andy.warmcat.com@googlemail.com designates 74.125.82.178 as permitted sender) smtp.mail=andy.warmcat.com@googlemail.com; dkim=pass (test mode) header.i=@googlemail.com Received: by mail-wy0-f178.google.com with SMTP id 28so1247412wyf.37 for ; Thu, 03 Mar 2011 05:50:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=gamma; h=domainkey-signature:sender:from:subject:to:cc:date:message-id :in-reply-to:references:user-agent:mime-version:content-type :content-transfer-encoding; bh=E/8CfF616AMWXGzXBeCBAzshAKL4z3m55ObKbLn+Si0=; b=AqCIY/lkQSjScglVa+zQXFTObUx+KDQJpem0MJ9Z0lodXB/H8OcNH3YeH8f0e9rWvC Wqvte5DuiCsyYoaXBct/Kbxaq+PJUCZHEnucHfLslvIEXNiUg3swvV43TdxMSehaucXq mWTH02TbCHVyVjOk8hl9WdvuCI64mj6fFFlco= DomainKey-Signature: a=rsa-sha1; c=nofws; d=googlemail.com; s=gamma; h=sender:from:subject:to:cc:date:message-id:in-reply-to:references :user-agent:mime-version:content-type:content-transfer-encoding; b=S9pyl4A1LE//f4zv3FLCoLGFyLD/IM8aJkxDL2Ci3aOPKZ0CEhxrZAnnemrYgPEyEp y9oFSi/mI4hMFCOuex3Fu3ncNFwmMe4H/FjDTbX2ADdZYw6BQnhhHD81ghBeTgJXa+tV 1l+N5wvPj1gugzG6xG2av9oCDVqnlb6Z7CUp4= Received: by 10.227.151.65 with SMTP id b1mr937056wbw.163.1299160246822; Thu, 03 Mar 2011 05:50:46 -0800 (PST) Received: from otae.warmcat.com (s15404224.onlinehome-server.info [87.106.134.80]) by mx.google.com with ESMTPS id u9sm897655wbg.18.2011.03.03.05.50.45 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 03 Mar 2011 05:50:46 -0800 (PST) Sender: Andy Green From: Andy Green Subject: [PATCH 4/4] OMAP3 and 4 I2C use cpu type consistently for new register availability To: linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org Cc: patches@linaro.org, Andy Green Date: Thu, 03 Mar 2011 13:50:44 +0000 Message-ID: <20110303135044.30648.27273.stgit@otae.warmcat.com> In-Reply-To: <20110303134744.30648.91218.stgit@otae.warmcat.com> References: <20110303134744.30648.91218.stgit@otae.warmcat.com> User-Agent: StGIT/0.14.3 MIME-Version: 1.0 The driver makes the choice about which register layout to use based on cpu, however it then tries to use the probed peripheral unit version register to decide whether to access registers that only exist in the 4430 unit. Unfortunately, the unit with the smaller register map on the OMAP3530 has the same peripheral unit version number, leading the OMAP3530 to dereference the register map beyond the bounds of its array, and then to access a 'random' register offset taken from whatever happens to be sitting beyond the register map array, as reported here https://bugs.launchpad.net/linux-linaro/+bug/645324 This patch makes both the choice of register map and the decision to use a register only present in the larger map both do so based on cpu type, which correctly reflects register availability. Cc: patches@linaro.org Reported-by: Peter Maydell Signed-off-by: Andy Green --- drivers/i2c/busses/i2c-omap.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c index e09c62d..c82e1bb5 100644 --- a/drivers/i2c/busses/i2c-omap.c +++ b/drivers/i2c/busses/i2c-omap.c @@ -309,7 +309,7 @@ static void omap_i2c_idle(struct omap_i2c_dev *dev) pdata = pdev->dev.platform_data; dev->iestate = omap_i2c_read_reg(dev, OMAP_I2C_IE_REG); - if (dev->rev >= OMAP_I2C_REV_ON_4430) + if (cpu_is_omap44xx()) omap_i2c_write_reg(dev, OMAP_I2C_OMAP4430_IRQENABLE_CLR, 1); else omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, 0);