From patchwork Thu Nov 24 05:57:41 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 83793 Delivered-To: patch@linaro.org Received: by 10.140.20.101 with SMTP id 92csp9360qgi; Wed, 23 Nov 2016 22:00:36 -0800 (PST) X-Received: by 10.98.41.3 with SMTP id p3mr737250pfp.22.1479967236312; Wed, 23 Nov 2016 22:00:36 -0800 (PST) Return-Path: Received: from bombadil.infradead.org (bombadil.infradead.org. [2001:1868:205::9]) by mx.google.com with ESMTPS id o2si37709524pga.26.2016.11.23.22.00.36 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 23 Nov 2016 22:00:36 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:1868:205::9 as permitted sender) client-ip=2001:1868:205::9; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com; spf=pass (google.com: best guess record for domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:1868:205::9 as permitted sender) smtp.mailfrom=linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1c9n4K-0001Vr-Qx; Thu, 24 Nov 2016 05:59:36 +0000 Received: from conuserg-09.nifty.com ([210.131.2.76]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1c9n3O-00013j-OG for linux-arm-kernel@lists.infradead.org; Thu, 24 Nov 2016 05:58:43 +0000 Received: from pug.jp.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-09.nifty.com with ESMTP id uAO5vlj7010771; Thu, 24 Nov 2016 14:57:52 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-09.nifty.com uAO5vlj7010771 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1479967073; bh=gprdjxqrVFmsG8IMXMa2KrpOGeC3lY2FZFLzGVH/hnQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=J2jAcoId85VOQmhOfF6CssojO7SRcYhefH6k6yPsjGP6XXcoVifM9oPHxJ3xdEgDK KM+882EIjLyUKK6SSjU1B33171Fz/WglKDdmvqbWI097Gvt4Hk6RC8c4vDDjRB1LSn 0OcM/kOXkXUssgfiQRj3z3QYcbrmAaZ7FBYGDIed9ujun2ILTGX6B6I5Bkci/8kuu4 23lTdPUg/SLb2ZGYQm+r/oG00dlwTlkQE3pujSX9K09kpX2q5z6AmYdSPZG4p9R3QA 9t82Aa1uU5zcqCup2RJisHVfbJtStuXChH3aLHbnzRDkXNdgjXq1kQgfiK09nFT+Lf NJRo37zYoS42w== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: linux-clk@vger.kernel.org Subject: [PATCH v2 3/3] clk: uniphier: add cpufreq data for LD11, LD20 SoCs Date: Thu, 24 Nov 2016 14:57:41 +0900 Message-Id: <1479967061-25975-3-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1479967061-25975-1-git-send-email-yamada.masahiro@socionext.com> References: <1479967061-25975-1-git-send-email-yamada.masahiro@socionext.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20161123_215839_360673_8F3FD06C X-CRM114-Status: GOOD ( 10.77 ) X-Spam-Score: -1.2 (-) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-1.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 RCVD_IN_MSPIKE_L4 RBL: Bad reputation (-4) [210.131.2.76 listed in bl.mailspike.net] 0.7 SPF_SOFTFAIL SPF: sender does not match SPF record (softfail) -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid 0.0 RCVD_IN_MSPIKE_BL Mailspike blacklisted X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Masahiro Yamada , Michael Turquette , Stephen Boyd , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org Add more data to 64bit SoCs for the cpufreq support. Signed-off-by: Masahiro Yamada --- Changes in v2: - Drop clock data of 32 bit SoCs. Add 64 bit SoC data for now. drivers/clk/uniphier/clk-uniphier-sys.c | 32 ++++++++++++++++++++++++++++++++ drivers/clk/uniphier/clk-uniphier.h | 30 +++++++++++++++++++++++++++++- 2 files changed, 61 insertions(+), 1 deletion(-) -- 2.7.4 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel diff --git a/drivers/clk/uniphier/clk-uniphier-sys.c b/drivers/clk/uniphier/clk-uniphier-sys.c index 5d02999..d049316 100644 --- a/drivers/clk/uniphier/clk-uniphier-sys.c +++ b/drivers/clk/uniphier/clk-uniphier-sys.c @@ -125,16 +125,35 @@ const struct uniphier_clk_data uniphier_pxs2_sys_clk_data[] = { }; const struct uniphier_clk_data uniphier_ld11_sys_clk_data[] = { + UNIPHIER_CLK_FACTOR("cpll", -1, "ref", 392, 5), /* 1960 MHz */ + UNIPHIER_CLK_FACTOR("mpll", -1, "ref", 64, 1), /* 1600 MHz */ UNIPHIER_CLK_FACTOR("spll", -1, "ref", 80, 1), /* 2000 MHz */ + UNIPHIER_CLK_FACTOR("vspll", -1, "ref", 80, 1), /* 2000 MHz */ UNIPHIER_CLK_FACTOR("uart", 0, "spll", 1, 34), UNIPHIER_CLK_FACTOR("i2c", 1, "spll", 1, 40), UNIPHIER_LD11_SYS_CLK_STDMAC(8), /* HSC, MIO */ UNIPHIER_CLK_FACTOR("usb2", -1, "ref", 24, 25), + /* CPU gears */ + UNIPHIER_CLK_DIV4("cpll", 2, 3, 4, 8), + UNIPHIER_CLK_DIV4("mpll", 2, 3, 4, 8), + UNIPHIER_CLK_DIV3("spll", 3, 4, 8), + /* Note: both gear1 and gear4 are spll/4. This is not a bug. */ + UNIPHIER_CLK_CPUGEAR("cpu-ca53", 33, 0x8080, 0xf, 8, + "cpll/2", "spll/4", "cpll/3", "spll/3", + "spll/4", "spll/8", "cpll/4", "cpll/8"), + UNIPHIER_CLK_CPUGEAR("cpu-ipp", 34, 0x8100, 0xf, 8, + "mpll/2", "spll/4", "mpll/3", "spll/3", + "spll/4", "spll/8", "mpll/4", "mpll/8"), { /* sentinel */ } }; const struct uniphier_clk_data uniphier_ld20_sys_clk_data[] = { + UNIPHIER_CLK_FACTOR("cpll", -1, "ref", 88, 1), /* ARM: 2200 MHz */ + UNIPHIER_CLK_FACTOR("gppll", -1, "ref", 52, 1), /* Mali: 1300 MHz */ + UNIPHIER_CLK_FACTOR("mpll", -1, "ref", 64, 1), /* Codec: 1600 MHz */ UNIPHIER_CLK_FACTOR("spll", -1, "ref", 80, 1), /* 2000 MHz */ + UNIPHIER_CLK_FACTOR("s2pll", -1, "ref", 88, 1), /* IPP: 2200 MHz */ + UNIPHIER_CLK_FACTOR("vppll", -1, "ref", 504, 5), /* 2520 MHz */ UNIPHIER_CLK_FACTOR("uart", 0, "spll", 1, 34), UNIPHIER_CLK_FACTOR("i2c", 1, "spll", 1, 40), UNIPHIER_LD20_SYS_CLK_SD, @@ -147,5 +166,18 @@ const struct uniphier_clk_data uniphier_ld20_sys_clk_data[] = { UNIPHIER_CLK_GATE("usb30", 14, NULL, 0x210c, 14), UNIPHIER_CLK_GATE("usb30-phy0", 16, NULL, 0x210c, 12), UNIPHIER_CLK_GATE("usb30-phy1", 17, NULL, 0x210c, 13), + /* CPU gears */ + UNIPHIER_CLK_DIV4("cpll", 2, 3, 4, 8), + UNIPHIER_CLK_DIV4("spll", 2, 3, 4, 8), + UNIPHIER_CLK_DIV4("s2pll", 2, 3, 4, 8), + UNIPHIER_CLK_CPUGEAR("cpu-ca72", 32, 0x8000, 0xf, 8, + "cpll/2", "spll/2", "cpll/3", "spll/3", + "spll/4", "spll/8", "cpll/4", "cpll/8"), + UNIPHIER_CLK_CPUGEAR("cpu-ca53", 33, 0x8080, 0xf, 8, + "cpll/2", "spll/2", "cpll/3", "spll/3", + "spll/4", "spll/8", "cpll/4", "cpll/8"), + UNIPHIER_CLK_CPUGEAR("cpu-ipp", 34, 0x8100, 0xf, 8, + "s2pll/2", "spll/2", "s2pll/3", "spll/3", + "spll/4", "spll/8", "s2pll/4", "s2pll/8"), { /* sentinel */ } }; diff --git a/drivers/clk/uniphier/clk-uniphier.h b/drivers/clk/uniphier/clk-uniphier.h index 62816f8..81d7e5c 100644 --- a/drivers/clk/uniphier/clk-uniphier.h +++ b/drivers/clk/uniphier/clk-uniphier.h @@ -75,6 +75,20 @@ struct uniphier_clk_data { }; }; +#define UNIPHIER_CLK_CPUGEAR(_name, _idx, _regbase, _mask, \ + _num_parents, ...) \ + { \ + .name = (_name), \ + .type = UNIPHIER_CLK_TYPE_CPUGEAR, \ + .idx = (_idx), \ + .cpugear = { \ + .parent_names = { __VA_ARGS__ }, \ + .num_parents = (_num_parents), \ + .regbase = (_regbase), \ + .mask = (_mask) \ + }, \ + } + #define UNIPHIER_CLK_FACTOR(_name, _idx, _parent, _mult, _div) \ { \ .name = (_name), \ @@ -87,7 +101,6 @@ struct uniphier_clk_data { }, \ } - #define UNIPHIER_CLK_GATE(_name, _idx, _parent, _reg, _bit) \ { \ .name = (_name), \ @@ -100,6 +113,21 @@ struct uniphier_clk_data { }, \ } +#define UNIPHIER_CLK_DIV(parent, div) \ + UNIPHIER_CLK_FACTOR(parent "/" #div, -1, parent, 1, div) + +#define UNIPHIER_CLK_DIV2(parent, div0, div1) \ + UNIPHIER_CLK_DIV(parent, div0), \ + UNIPHIER_CLK_DIV(parent, div1) + +#define UNIPHIER_CLK_DIV3(parent, div0, div1, div2) \ + UNIPHIER_CLK_DIV2(parent, div0, div1), \ + UNIPHIER_CLK_DIV(parent, div2) + +#define UNIPHIER_CLK_DIV4(parent, div0, div1, div2, div3) \ + UNIPHIER_CLK_DIV2(parent, div0, div1), \ + UNIPHIER_CLK_DIV2(parent, div2, div3) + struct clk_hw *uniphier_clk_register_cpugear(struct device *dev, struct regmap *regmap, const char *name,