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Wysocki" , Viresh Kumar Subject: [PATCH 3/5] ARM: dts: Add Integrator/CP cpus node and operating points Date: Wed, 19 Oct 2016 11:59:12 +0200 Message-Id: <1476871154-32243-4-git-send-email-linus.walleij@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1476871154-32243-1-git-send-email-linus.walleij@linaro.org> References: <1476871154-32243-1-git-send-email-linus.walleij@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20161019_025949_969253_B510D3FD X-CRM114-Status: GOOD ( 17.42 ) X-Spam-Score: -2.7 (--) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-2.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [2a00:1450:4010:c07:0:0:0:232 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Arnd Bergmann , linux-pm@vger.kernel.org, Linus Walleij , "Rafael J . Wysocki" , Russell King , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org This adds the cpus node to the Integrator/CP device tree so that we have a proper placeholder to put in the DT-defined operating points for the generic DT/OPP cpufreq driver, along with two working operating points. I have only put in 48 and 50 MHz because going to e.g. 36 MHz hangs the system when CLCD graphics are active. Presumably the memory bus gets to slow to feed the display and the systems hangs for this reason. The ideal solution would be for the display controller to put constraints on the memory bus frequency, but that need to be a separate longer-term project. We define a CPU node since this is required for cpufreq-dt, however we do not define any compatible string for the CPU since this architecture has pluggable CPU modules and we do not know which one will be used. If necessary, the CPU compatible can be filled in by the boot loader, but for just cpufreq-dt it is not required. Cc: Rafael J. Wysocki Cc: Viresh Kumar Cc: Russell King Signed-off-by: Linus Walleij --- arch/arm/boot/dts/integratorcp.dts | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) -- 2.7.4 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel diff --git a/arch/arm/boot/dts/integratorcp.dts b/arch/arm/boot/dts/integratorcp.dts index 1b5e4b006b72..97f38b57a702 100644 --- a/arch/arm/boot/dts/integratorcp.dts +++ b/arch/arm/boot/dts/integratorcp.dts @@ -13,6 +13,32 @@ bootargs = "root=/dev/ram0 console=ttyAMA0,38400n8 earlyprintk"; }; + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + /* + * Since the board has pluggable CPU modules, we + * cannot define a proper compatible here. Let the + * boot loader fill in the apropriate compatible + * string if necessary. + */ + /* compatible = "arm,arm920t"; */ + reg = <0>; + /* + * TBD comment. + */ + /* kHz uV */ + operating-points = <50000 0 + 48000 0>; + clocks = <&cmcore>; + clock-names = "cpu"; + clock-latency = <1000000>; /* 1 ms */ + }; + }; + /* * The Integrator/CP overall clocking architecture can be found in * ARM DUI 0184B page 7-28 "Integrator/CP922T system clocks" which