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[2001:1868:205::9]) by mx.google.com with ESMTPS id 18si9935008pfk.163.2016.08.24.07.38.18 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 24 Aug 2016 07:38:18 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:1868:205::9 as permitted sender) client-ip=2001:1868:205::9; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:1868:205::9 as permitted sender) smtp.mailfrom=linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org; dmarc=fail (p=NONE dis=NONE) header.from=linaro.org Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bcZIn-0005ZE-If; Wed, 24 Aug 2016 14:37:13 +0000 Received: from mail-wm0-x229.google.com ([2a00:1450:400c:c09::229]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1bcZID-0005Jq-CK for linux-arm-kernel@lists.infradead.org; Wed, 24 Aug 2016 14:36:41 +0000 Received: by mail-wm0-x229.google.com with SMTP id i5so31379674wmg.0 for ; Wed, 24 Aug 2016 07:36:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=lUsgOwigbk9AF4yUmJ3DnZgCF87psLGxGVCY3XHQxpg=; b=a3MSp02wX/K9hHYsX2YpTgU/Vcclkh9fjSfE3jnyP+28MwYeScI+y2juxAgF1Y1md7 M4A0JO28qnuuBWNf59P5Pa/1ulrX4pdhLIWFUcJ/qfqaMXgFYYzCsZLNOzdfsFd2CHsP UUFO7DJPFX81/OdYYue/3ZhPo773q+vYFYHaA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=lUsgOwigbk9AF4yUmJ3DnZgCF87psLGxGVCY3XHQxpg=; b=kjVzdRICl9u4IMwBjU8LVEAZLasSUigQc1NwH9A0s8gB0f/lpuP+7iYjYzF/0DJCnq 5X2Bx2XEgGUgXYM1qtE9A0/db3fv68aBCHmU0KRfsuadQjXx8int3CNgsasA39v+Qvor yLmp0TAmVLJ0N7MPR7mkvS4aLseCwyOXCOyUVSn+5d+8qQU1n/LPtHMaUjjBf3EDZaO+ EONc6453qDUb42zUC2WzLI2VxR4pWvrH8gtEof0U1eAvFOuPcutryGDK/eCWkmFw9drj oIjiZEn1kPixty9GCMzmIyveI3/c89HNDakc5c4ZnvYWW7kUk+Dxda1Gj8sYtZaMwZ89 Gp8g== X-Gm-Message-State: AEkoouspBnwNBoGyCcVy/j0kOzam5Ef2tPNMjsVT0mVXFK5wRFg0FxBmPWDeBHEYusk5deQs X-Received: by 10.28.47.7 with SMTP id v7mr25690479wmv.38.1472049379623; Wed, 24 Aug 2016 07:36:19 -0700 (PDT) Received: from localhost.localdomain ([213.143.60.123]) by smtp.gmail.com with ESMTPSA id n2sm10365569wjd.1.2016.08.24.07.36.17 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 24 Aug 2016 07:36:18 -0700 (PDT) From: Ard Biesheuvel To: linux-arm-kernel@lists.infradead.org, catalin.marinas@arm.com, will.deacon@arm.com, mark.rutland@arm.com, james.morse@arm.com Subject: [PATCH v2 3/9] arm64: kernel: use ordinary return/argument register for el2_setup() Date: Wed, 24 Aug 2016 16:36:00 +0200 Message-Id: <1472049366-10922-4-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1472049366-10922-1-git-send-email-ard.biesheuvel@linaro.org> References: <1472049366-10922-1-git-send-email-ard.biesheuvel@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160824_073637_639443_EC6F72C1 X-CRM114-Status: GOOD ( 11.56 ) X-Spam-Score: -2.0 (--) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-2.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ard Biesheuvel MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org The function el2_setup() passes its return value in register w20, and in the two cases where the caller actually cares about this return value, it is passed into set_cpu_boot_mode_flag() [almost] directly, which expects its input in w20 as well. So there is no reason to use a 'special' callee saved register here, but we can simply follow the PCS for return value and first argument, respectively. Signed-off-by: Ard Biesheuvel --- arch/arm64/kernel/head.S | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) -- 2.7.4 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel Reviewed-by: Mark Rutland diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S index 219676253dbc..2871271123e7 100644 --- a/arch/arm64/kernel/head.S +++ b/arch/arm64/kernel/head.S @@ -210,7 +210,7 @@ efi_header_end: ENTRY(stext) bl preserve_boot_args - bl el2_setup // Drop to EL1, w20=cpu_boot_mode + bl el2_setup // Drop to EL1, w0=cpu_boot_mode adrp x24, __PHYS_OFFSET and x23, x24, MIN_KIMG_ALIGN - 1 // KASLR offset, defaults to 0 bl set_cpu_boot_mode_flag @@ -488,7 +488,7 @@ CPU_LE( bic x0, x0, #(1 << 25) ) // Clear the EE bit for EL2 CPU_BE( orr x0, x0, #(3 << 24) ) // Set the EE and E0E bits for EL1 CPU_LE( bic x0, x0, #(3 << 24) ) // Clear the EE and E0E bits for EL1 msr sctlr_el1, x0 - mov w20, #BOOT_CPU_MODE_EL1 // This cpu booted in EL1 + mov w0, #BOOT_CPU_MODE_EL1 // This cpu booted in EL1 isb ret @@ -584,7 +584,7 @@ CPU_LE( movk x0, #0x30d0, lsl #16 ) // Clear EE and E0E on LE systems cbz x2, install_el2_stub - mov w20, #BOOT_CPU_MODE_EL2 // This CPU booted in EL2 + mov w0, #BOOT_CPU_MODE_EL2 // This CPU booted in EL2 isb ret @@ -599,7 +599,7 @@ install_el2_stub: PSR_MODE_EL1h) msr spsr_el2, x0 msr elr_el2, lr - mov w20, #BOOT_CPU_MODE_EL2 // This CPU booted in EL2 + mov w0, #BOOT_CPU_MODE_EL2 // This CPU booted in EL2 eret ENDPROC(el2_setup) @@ -609,10 +609,10 @@ ENDPROC(el2_setup) */ set_cpu_boot_mode_flag: adr_l x1, __boot_cpu_mode - cmp w20, #BOOT_CPU_MODE_EL2 + cmp w0, #BOOT_CPU_MODE_EL2 b.ne 1f add x1, x1, #4 -1: str w20, [x1] // This CPU has booted in EL1 +1: str w0, [x1] // This CPU has booted in EL1 dmb sy dc ivac, x1 // Invalidate potentially stale cache line ret @@ -637,7 +637,7 @@ ENTRY(__boot_cpu_mode) * cores are held until we're ready for them to initialise. */ ENTRY(secondary_holding_pen) - bl el2_setup // Drop to EL1, w20=cpu_boot_mode + bl el2_setup // Drop to EL1, w0=cpu_boot_mode bl set_cpu_boot_mode_flag mrs x0, mpidr_el1 mov_q x1, MPIDR_HWID_BITMASK