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[81.34.118.3]) by smtp.gmail.com with ESMTPSA id uo4sm8291402wjc.36.2016.08.03.08.38.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 03 Aug 2016 08:38:56 -0700 (PDT) From: Ard Biesheuvel To: linux-arm-kernel@lists.infradead.org, linux@arm.linux.org.uk, nico@linaro.org, arnd@arndb.de, dave.martin@arm.com Subject: [PATCH 1/8] ARM: assembler: introduce adr_l, ldr_l and str_l macros Date: Wed, 3 Aug 2016 17:38:43 +0200 Message-Id: <1470238730-30038-2-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1470238730-30038-1-git-send-email-ard.biesheuvel@linaro.org> References: <1470238730-30038-1-git-send-email-ard.biesheuvel@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160803_083919_641184_1AA9C90D X-CRM114-Status: GOOD ( 11.15 ) X-Spam-Score: -2.7 (--) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-2.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [2a00:1450:400c:c09:0:0:0:234 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ard Biesheuvel MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org Like arm64, ARM supports position independent code sequences that produce symbol references with a greater reach than the ordinary adr/ldr instructions. Introduce adr_l, that takes the address of a symbol in a PC relative manner, and ldr_l/str_l that perform a 32-bit loads/stores from a PC-relative offset. Signed-off-by: Ard Biesheuvel --- arch/arm/include/asm/assembler.h | 59 ++++++++++++++++++++ 1 file changed, 59 insertions(+) -- 2.7.4 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h index 4eaea2173bf8..e1450889f96b 100644 --- a/arch/arm/include/asm/assembler.h +++ b/arch/arm/include/asm/assembler.h @@ -512,4 +512,63 @@ THUMB( orr \reg , \reg , #PSR_T_BIT ) #endif .endm +/* + * Pseudo-ops for PC-relative adr/ldr/str , operations + */ + + /* + * @dst: destination register + * @sym: name of the symbol + */ + .macro adr_l, dst, sym +#ifdef CONFIG_THUMB2_KERNEL + movw \dst, #:lower16:(\sym) - (. + 12) + movt \dst, #:upper16:(\sym) - (. + 8) + add \dst, \dst, pc +#else + add \dst, pc, #:pc_g0_nc:(\sym) - 8 + add \dst, \dst, #:pc_g1_nc:(\sym) - 4 + add \dst, \dst, #:pc_g2:(\sym) +#endif + .endm + + /* + * @dst: destination register + * @sym: name of the symbol + * @tmp: optional scratch register to be used if == sp, which + * is not allowed in a Thumb2 ldr instruction + */ + .macro ldr_l, dst, sym, tmp +#ifdef CONFIG_THUMB2_KERNEL + .ifnb \tmp + adr_l \tmp, \sym + ldr \dst, [\tmp] + .else + adr_l \dst, \sym + ldr \dst, [\dst] + .endif +#else + add \dst, pc, #:pc_g0_nc:(\sym) - 8 + add \dst, \dst, #:pc_g1_nc:(\sym) - 4 + ldr \dst, [\dst, #:pc_g2:(\sym)] +#endif + .endm + + /* + * @src: source register + * @sym: name of the symbol + * @tmp: mandatory scratch register to calculate the address + * while needs to be preserved. + */ + .macro str_l, src, sym, tmp:req +#ifdef CONFIG_THUMB2_KERNEL + adr_l \tmp, \sym + str \src, [\tmp] +#else + add \tmp, pc, #:pc_g0_nc:(\sym) - 8 + add \tmp, \tmp, #:pc_g1_nc:(\sym) - 4 + str \src, [\tmp, #:pc_g2:(\sym)] +#endif + .endm + #endif /* __ASM_ASSEMBLER_H__ */