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[2001:1868:205::9]) by mx.google.com with ESMTPS id r9si8550321pae.39.2016.06.03.16.27.24 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 03 Jun 2016 16:27:24 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:1868:205::9 as permitted sender) client-ip=2001:1868:205::9; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:1868:205::9 as permitted sender) smtp.mailfrom=linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org; dmarc=fail (p=NONE dis=NONE) header.from=linaro.org Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1b8yTn-0000Hc-CK; Fri, 03 Jun 2016 23:26:15 +0000 Received: from mail-oi0-x232.google.com ([2607:f8b0:4003:c06::232]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1b8yTd-0000Cp-3v for linux-arm-kernel@lists.infradead.org; Fri, 03 Jun 2016 23:26:05 +0000 Received: by mail-oi0-x232.google.com with SMTP id w184so149828987oiw.2 for ; Fri, 03 Jun 2016 16:25:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=XAybwf1WmW4zJeCCl+VGnKX76e7X0ZmbDBdPotrZIzk=; b=iIN0YLjTJohYDvO5SQBPsoJICnewBdcQvyGPXF21SHC0bSiX7VbMduA6fjkjA0IpPJ qVkND6SlCF2I8D3e1lFUMP0LkX1nSzOUHMZuC5Jt/SB2MBcq8yQXaVHUgBRNXikaBiud 3pZBBIQR+ZXQgh+6jkBac1MSSVNoDeGbO1JP8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=XAybwf1WmW4zJeCCl+VGnKX76e7X0ZmbDBdPotrZIzk=; b=P4hIybPWOueq6oWgo0YdfqNF4UPBXWmKwq6lzyuEe0XI3c2nW+oQfpo/d5ROXUbVqY riDy5gBwaXh+v4avrT5RJVomS290vS4XGugF3P349HLXoS12OvA0MNwRY/qjfiX9yKO1 hBRP9ayu356Y5cnY8DA3TbckZnWF8gIHDAn0kPR4GoK5uL15wGc1Csam7S1b9HNmoA78 rdXux59WduM74ucKp3Vg9Z8f7kP1jc1eIe0tXwm7cyQWJD2ptoW8O6F6XTX1j1jN3rI/ pOVlpFAPYp9UoGLvLV8UolbLHnCizseXqN0zHKPHc6GlehmoKPR8/4qaLyVtqJXF3/Kp wm2w== X-Gm-Message-State: ALyK8tLSTB4wuexZ6JO2H3gpmqRtalWJNCI42pNlL7pNL4BF75H+6hZUbHVfXZbX/1eGrtEe X-Received: by 10.157.46.177 with SMTP id w46mr3053560ota.181.1464996344758; Fri, 03 Jun 2016 16:25:44 -0700 (PDT) Received: from localhost ([2602:306:c558:19b0:a575:d8f4:7700:e330]) by smtp.gmail.com with ESMTPSA id 92sm4374004otw.16.2016.06.03.16.25.44 (version=TLS1_2 cipher=AES128-SHA bits=128/128); Fri, 03 Jun 2016 16:25:44 -0700 (PDT) From: Andy Gross To: linux-arm-msm@vger.kernel.org Subject: [Patch v6 01/10] dt/bindings: firmware: Add Qualcomm SCM binding Date: Fri, 3 Jun 2016 18:25:21 -0500 Message-Id: <1464996330-16952-2-git-send-email-andy.gross@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1464996330-16952-1-git-send-email-andy.gross@linaro.org> References: <1464996330-16952-1-git-send-email-andy.gross@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160603_162605_218806_A3499FBC X-CRM114-Status: GOOD ( 11.79 ) X-Spam-Score: -2.7 (--) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-2.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [2607:f8b0:4003:c06:0:0:0:232 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Stephen Boyd , linux-kernel@vger.kernel.org, Bjorn Andersson , Andy Gross , jilai wang , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org This patch adds the device tree support for the Qualcomm SCM firmware. Signed-off-by: Andy Gross Reviewed-by: Stephen Boyd Acked-by: Bjorn Andersson Acked-by: Rob Herring --- .../devicetree/bindings/firmware/qcom,scm.txt | 28 ++++++++++++++++++++++ 1 file changed, 28 insertions(+) create mode 100644 Documentation/devicetree/bindings/firmware/qcom,scm.txt -- 1.9.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.txt b/Documentation/devicetree/bindings/firmware/qcom,scm.txt new file mode 100644 index 0000000..3b4436e --- /dev/null +++ b/Documentation/devicetree/bindings/firmware/qcom,scm.txt @@ -0,0 +1,28 @@ +QCOM Secure Channel Manager (SCM) + +Qualcomm processors include an interface to communicate to the secure firmware. +This interface allows for clients to request different types of actions. These +can include CPU power up/down, HDCP requests, loading of firmware, and other +assorted actions. + +Required properties: +- compatible: must contain one of the following: + * "qcom,scm-apq8064" for APQ8064 platforms + * "qcom,scm-msm8660" for MSM8660 platforms + * "qcom,scm-msm8690" for MSM8690 platforms + * "qcom,scm" for later processors (MSM8916, APQ8084, MSM8974, etc) +- clocks: One to three clocks may be required based on compatible. + * Only core clock required for "qcom,scm-apq8064", "qcom,scm-msm8660", and "qcom,scm-msm8960" + * Core, iface, and bus clocks required for "qcom,scm" +- clock-names: Must contain "core" for the core clock, "iface" for the interface + clock and "bus" for the bus clock per the requirements of the compatible. + +Example for MSM8916: + + firmware { + scm { + compatible = "qcom,scm"; + clocks = <&gcc GCC_CRYPTO_CLK> , <&gcc GCC_CRYPTO_AXI_CLK>, <&gcc GCC_CRYPTO_AHB_CLK>; + clock-names = "core", "bus", "iface"; + }; + };