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[68.147.8.254]) by smtp.gmail.com with ESMTPSA id vg8sm1975886igb.15.2016.04.22.10.14.35 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 22 Apr 2016 10:14:36 -0700 (PDT) From: Mathieu Poirier To: linux-arm-kernel@lists.infradead.org, Suzuki.Poulose@arm.com Subject: [PATCH V3 11/18] coresight: tmc: adding mode of operation for link/sinks Date: Fri, 22 Apr 2016 11:14:08 -0600 Message-Id: <1461345255-11758-12-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1461345255-11758-1-git-send-email-mathieu.poirier@linaro.org> References: <1461345255-11758-1-git-send-email-mathieu.poirier@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160422_101458_434614_1CF0E5FC X-CRM114-Status: GOOD ( 16.63 ) X-Spam-Score: -2.7 (--) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-2.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [2607:f8b0:4001:c06:0:0:0:234 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-kernel@vger.kernel.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org Moving tmc_drvdata::enable to a local_t mode. That way the sink interface is aware of it's orgin and the foundation for mutual exclusion between the sysFS and Perf interface can be laid out. Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-tmc-etf.c | 28 ++++++++++++++++++------- drivers/hwtracing/coresight/coresight-tmc-etr.c | 24 ++++++++++++++++----- drivers/hwtracing/coresight/coresight-tmc.h | 4 ++-- 3 files changed, 42 insertions(+), 14 deletions(-) -- 2.5.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c b/drivers/hwtracing/coresight/coresight-tmc-etf.c index bcfa40e8cd1c..d090a9745c73 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etf.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c @@ -110,6 +110,7 @@ static int tmc_enable_etf_sink(struct coresight_device *csdev, u32 mode) { bool used = false; char *buf = NULL; + long val; unsigned long flags; struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); @@ -147,6 +148,15 @@ fast_path: return -EBUSY; } + val = local_xchg(&drvdata->mode, mode); + /* + * In sysFS mode we can have multiple writers per sink. Since this + * sink is already enabled no memory is needed and the HW need not be + * touched. + */ + if (val == CS_MODE_SYSFS) + goto spin_unlock; + /* * If drvdata::buf isn't NULL, memory was allocated for a previous * trace run but wasn't read. If so simply zero-out the memory. @@ -164,7 +174,7 @@ fast_path: } tmc_etb_enable_hw(drvdata); - drvdata->enable = true; +spin_unlock: spin_unlock_irqrestore(&drvdata->spinlock, flags); /* Free memory outside the spinlock if need be */ @@ -177,6 +187,7 @@ fast_path: static void tmc_disable_etf_sink(struct coresight_device *csdev) { + long val; unsigned long flags; struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); @@ -186,8 +197,11 @@ static void tmc_disable_etf_sink(struct coresight_device *csdev) return; } - tmc_etb_disable_hw(drvdata); - drvdata->enable = false; + val = local_xchg(&drvdata->mode, CS_MODE_DISABLED); + /* Disable the TMC only if it needs to */ + if (val != CS_MODE_DISABLED) + tmc_etb_disable_hw(drvdata); + spin_unlock_irqrestore(&drvdata->spinlock, flags); dev_info(drvdata->dev, "TMC-ETB/ETF disabled\n"); @@ -206,7 +220,7 @@ static int tmc_enable_etf_link(struct coresight_device *csdev, } tmc_etf_enable_hw(drvdata); - drvdata->enable = true; + local_set(&drvdata->mode, CS_MODE_SYSFS); spin_unlock_irqrestore(&drvdata->spinlock, flags); dev_info(drvdata->dev, "TMC-ETF enabled\n"); @@ -226,7 +240,7 @@ static void tmc_disable_etf_link(struct coresight_device *csdev, } tmc_etf_disable_hw(drvdata); - drvdata->enable = false; + local_set(&drvdata->mode, CS_MODE_DISABLED); spin_unlock_irqrestore(&drvdata->spinlock, flags); dev_info(drvdata->dev, "TMC disabled\n"); @@ -278,7 +292,7 @@ int tmc_read_prepare_etb(struct tmc_drvdata *drvdata) } /* Disable the TMC if need be */ - if (drvdata->enable) + if (local_read(&drvdata->mode) == CS_MODE_SYSFS) tmc_etb_disable_hw(drvdata); drvdata->reading = true; @@ -309,7 +323,7 @@ int tmc_read_unprepare_etb(struct tmc_drvdata *drvdata) } /* Re-enable the TMC if need be */ - if (drvdata->enable) { + if (local_read(&drvdata->mode) == CS_MODE_SYSFS) { /* * The trace run will continue with the same allocated trace * buffer. As such zero-out the buffer so that we don't end diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c index 474c70c089f3..8bbbf3ab1387 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c @@ -85,6 +85,7 @@ static void tmc_etr_disable_hw(struct tmc_drvdata *drvdata) static int tmc_enable_etr_sink(struct coresight_device *csdev, u32 mode) { bool used = false; + long val; unsigned long flags; void __iomem *vaddr = NULL; dma_addr_t paddr; @@ -126,6 +127,15 @@ fast_path: return -EBUSY; } + val = local_xchg(&drvdata->mode, mode); + /* + * In sysFS mode we can have multiple writers per sink. Since this + * sink is already enabled no memory is needed and the HW need not be + * touched. + */ + if (val == CS_MODE_SYSFS) + goto spin_unlock; + /* * If drvdata::buf == NULL, use the memory allocated above. * Otherwise a buffer still exists from a previous session, so @@ -141,7 +151,7 @@ fast_path: memset(drvdata->vaddr, 0, drvdata->size); tmc_etr_enable_hw(drvdata); - drvdata->enable = true; +spin_unlock: spin_unlock_irqrestore(&drvdata->spinlock, flags); /* Free memory outside the spinlock if need be */ @@ -154,6 +164,7 @@ fast_path: static void tmc_disable_etr_sink(struct coresight_device *csdev) { + long val; unsigned long flags; struct tmc_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); @@ -163,8 +174,11 @@ static void tmc_disable_etr_sink(struct coresight_device *csdev) return; } - tmc_etr_disable_hw(drvdata); - drvdata->enable = false; + val = local_xchg(&drvdata->mode, CS_MODE_DISABLED); + /* Disable the TMC only if it needs to */ + if (val != CS_MODE_DISABLED) + tmc_etr_disable_hw(drvdata); + spin_unlock_irqrestore(&drvdata->spinlock, flags); dev_info(drvdata->dev, "TMC-ETR disabled\n"); @@ -196,7 +210,7 @@ int tmc_read_prepare_etr(struct tmc_drvdata *drvdata) } /* Disable the TMC if need be */ - if (drvdata->enable) + if (local_read(&drvdata->mode) == CS_MODE_SYSFS) tmc_etr_disable_hw(drvdata); drvdata->reading = true; @@ -218,7 +232,7 @@ int tmc_read_unprepare_etr(struct tmc_drvdata *drvdata) spin_lock_irqsave(&drvdata->spinlock, flags); /* RE-enable the TMC if need be */ - if (drvdata->enable) { + if (local_read(&drvdata->mode) == CS_MODE_SYSFS) { /* * The trace run will continue with the same allocated trace * buffer. As such zero-out the buffer so that we don't end diff --git a/drivers/hwtracing/coresight/coresight-tmc.h b/drivers/hwtracing/coresight/coresight-tmc.h index df661903f83c..9b4c215d2b6b 100644 --- a/drivers/hwtracing/coresight/coresight-tmc.h +++ b/drivers/hwtracing/coresight/coresight-tmc.h @@ -99,7 +99,7 @@ enum tmc_mem_intf_width { * @paddr: DMA start location in RAM. * @vaddr: virtual representation of @paddr. * @size: @buf size. - * @enable: this TMC is being used. + * @mode: how this TMC is being used. * @config_type: TMC variant, must be of type @tmc_config_type. * @trigger_cntr: amount of words to store after a trigger. */ @@ -115,7 +115,7 @@ struct tmc_drvdata { dma_addr_t paddr; void __iomem *vaddr; u32 size; - bool enable; + local_t mode; enum tmc_config_type config_type; u32 trigger_cntr; };