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[2001:1868:205::9]) by mx.google.com with ESMTPS id xg8si2556199pab.1.2016.04.15.03.12.51 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 15 Apr 2016 03:12:51 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:1868:205::9 as permitted sender) client-ip=2001:1868:205::9; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:1868:205::9 as permitted sender) smtp.mailfrom=linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org; dmarc=fail (p=NONE dis=NONE) header.from=linaro.org Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ar0j9-0004GT-Un; Fri, 15 Apr 2016 10:11:51 +0000 Received: from mail-wm0-x236.google.com ([2a00:1450:400c:c09::236]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ar0j5-00042g-EZ for linux-arm-kernel@lists.infradead.org; Fri, 15 Apr 2016 10:11:48 +0000 Received: by mail-wm0-x236.google.com with SMTP id a140so24362254wma.0 for ; Fri, 15 Apr 2016 03:11:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=WchilraNjqCxCiem9JaaIJvqIixVcn0fZHOCv9/bvgU=; b=PYRVW5lHsSQes0Yq9epDAwScHVLxs8EjktqCYCPMG3j/C2/9WO+WGlvDmZqpRdZql2 msoMjVVK+9Tv0ycw5cSve4RRfhh16ZpK9G4drJh1olgBJBpIhEbM2t8+exlNQr9SvXmp 1+gNwLkno1sR7ZCeiw/fbXYYkO4YZM1z2ROvE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=WchilraNjqCxCiem9JaaIJvqIixVcn0fZHOCv9/bvgU=; b=QvFF/Y/yqdjSnB2IPzdFbPswySjO6ljwhszZWwviv4f7DYn0ah6PoNWJp/zBRnaKLk ejmczVDoruExje0RIkrP9VyqKdrLvWEqb9LttsQQLY8oimmENspXYVlU8UMj12cb19TQ KQSlmp71nHV1MQnILCxSAYZIdXzzfqaX2EoDE3H6k7J8JfVXdKCpqX79mpcCrNTsEaDQ ++GCOLnXdCitaaYj5VFjRbRjlsYvLflAHTpgDfnlEKL+0tGCx72xOmpYGVv/AydM5OfM GOWLXMGraVPx1zvENcuAWrhlijYlDZJh51PK90OnygJEF5DqDhnVUTN9j+jvqF5xjEIW GHCw== X-Gm-Message-State: AOPr4FUoh17sjHC29zAhaVLuKihGKUyBxEKb6MYMspS5h8AO/ofGauPbRoKySeAGvjaRBpxV X-Received: by 10.28.54.70 with SMTP id d67mr3741996wma.94.1460715085918; Fri, 15 Apr 2016 03:11:25 -0700 (PDT) Received: from localhost.localdomain ([195.55.142.58]) by smtp.gmail.com with ESMTPSA id lh1sm48250870wjb.20.2016.04.15.03.11.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 15 Apr 2016 03:11:25 -0700 (PDT) From: Ard Biesheuvel To: linux-arm-kernel@lists.infradead.org, catalin.marinas@arm.com, will.deacon@arm.com, suzuki.poulose@arm.com Subject: [PATCH] arm64: fix invalidation of wrong __early_cpu_boot_status cacheline Date: Fri, 15 Apr 2016 12:11:21 +0200 Message-Id: <1460715081-16542-1-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.5.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160415_031147_878085_D40E038A X-CRM114-Status: GOOD ( 14.61 ) X-Spam-Score: -2.7 (--) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-2.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [2a00:1450:400c:c09:0:0:0:236 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ard Biesheuvel MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org In head.S, the str_l macro, which takes a source register, a symbol name and a temp register, is used to store a status value to the variable __early_cpu_boot_status. Subsequently, the value of the temp register is reused to invalidate any cachelines covering this variable. However, since str_l resolves to adrp \tmp, \sym str \src, [\tmp, :lo12:\sym] the temp register never actually holds the address of the variable but only of the 4 KB window that covers it, and reusing it leads to the wrong cacheline being invalidated. So instead, take the address explicitly before doing the store, and reuse that value to perform the cache invalidation. Signed-off-by: Ard Biesheuvel --- This deserves a cc stable, since the macro is always invoked for each CPU at boot. Alternatively, we could add a writeback to the str_l macro, but I think in general, making any assumptions about the value of a temp register is dodgy, so I prefer this approach instead. arch/arm64/kernel/head.S | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) -- 2.5.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel Acked-by: Mark Rutland diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S index 8b8a3d1e23fb..fafe21e49aab 100644 --- a/arch/arm64/kernel/head.S +++ b/arch/arm64/kernel/head.S @@ -693,7 +693,8 @@ ENDPROC(__secondary_switched) .macro update_early_cpu_boot_status status, tmp1, tmp2 mov \tmp2, #\status - str_l \tmp2, __early_cpu_boot_status, \tmp1 + adr_l \tmp1, __early_cpu_boot_status + str \tmp2, [\tmp1] dmb sy dc ivac, \tmp1 // Invalidate potentially stale cache line .endm