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[2001:1868:205::9]) by mx.google.com with ESMTPS id g7si10164603pat.103.2016.03.22.13.26.58 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 22 Mar 2016 13:26:58 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:1868:205::9 as permitted sender) client-ip=2001:1868:205::9; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:1868:205::9 as permitted sender) smtp.mailfrom=linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org; dkim=neutral (body hash did not verify) header.i=@linaro.org Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1aiSsI-0002As-Sh; Tue, 22 Mar 2016 20:25:58 +0000 Received: from mail-io0-x22c.google.com ([2607:f8b0:4001:c06::22c]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1aiSqZ-00088p-8z for linux-arm-kernel@lists.infradead.org; Tue, 22 Mar 2016 20:24:14 +0000 Received: by mail-io0-x22c.google.com with SMTP id 124so103061823iov.3 for ; Tue, 22 Mar 2016 13:23:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=3FRg+xUcHmlwmhgEQst8d3q4DQmWwRxGgy5IcostF0w=; b=S2nBJl0Y9cR3/nsk/LaGyEnULweGB5SLDG1AnC3RGVzwQUgXHdnpVcpTW+V2AQB4j8 vMIqjbtACV8Kwx1Af/HQGjx/HszYUF0U3WgGLyZZgnyePO7e/d1scYni6xQ7L7x3OdJf Snsi5JK/VWz05Cj4d0DJ1fecsRnHa5R61ZV0I= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=3FRg+xUcHmlwmhgEQst8d3q4DQmWwRxGgy5IcostF0w=; b=XisbESFfWCf85UNcjbVsEMCUfxTGLRA9UbXzYuuDGmCZSWXz8V+0ZYsIfTvFGw21mm EKEMvCjfl9e5zNwx/G7DQJ3puf0fNW0Zh82RbtyFsLl2FUv+4Nrza/PCru0JhSVgVCUq a/zx8RkbvQoS029Yb3S8DC4GGLGIoTI5p4ZMepuIbdrc2cN71FEIsdcmSQT3oU5NnUDK X0xI1dc86bhO+00L9cuJngibiYIOD/Oqb9nyTnFqnvQk2azEjzdEA7M4k+eX3o6mSC3J XvBKGmktMceL5Z68HhK03CReh08Tj07Uj8NEwMD9EW0VwWkoyVNdKeiqQsrR1wx1rjD5 lV+A== X-Gm-Message-State: AD7BkJIk/3ZaV9iLG5pUmXlfncEUOB2YXBBSlbDj4V6fr1uATL5tV/daSjrnjK+Lpkb2dAph X-Received: by 10.50.183.37 with SMTP id ej5mr20692479igc.55.1458678230232; Tue, 22 Mar 2016 13:23:50 -0700 (PDT) Received: from t430.cg.shawcable.net ([184.64.168.246]) by smtp.gmail.com with ESMTPSA id xo2sm8092061igb.0.2016.03.22.13.23.48 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 22 Mar 2016 13:23:49 -0700 (PDT) From: Mathieu Poirier To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 06/14] coresight: tmc: making prepare/unprepare functions generic Date: Tue, 22 Mar 2016 14:23:14 -0600 Message-Id: <1458678202-3447-7-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1458678202-3447-1-git-send-email-mathieu.poirier@linaro.org> References: <1458678202-3447-1-git-send-email-mathieu.poirier@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160322_132411_706030_B5414713 X-CRM114-Status: GOOD ( 16.77 ) X-Spam-Score: -2.7 (--) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-2.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [2607:f8b0:4001:c06:0:0:0:22c listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-kernel@vger.kernel.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org Dealing with HW related matters in tmc_read_prepare/unprepare becomes convoluted when many cases need to be handled distinctively. As such moving processing related to HW setup to individual driver files and keep the core driver generic. Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-tmc-etf.c | 68 ++++++++++++++++++++++++- drivers/hwtracing/coresight/coresight-tmc-etr.c | 50 +++++++++++++++++- drivers/hwtracing/coresight/coresight-tmc.c | 55 ++++---------------- drivers/hwtracing/coresight/coresight-tmc.h | 8 +-- 4 files changed, 131 insertions(+), 50 deletions(-) -- 2.1.4 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel diff --git a/drivers/hwtracing/coresight/coresight-tmc-etf.c b/drivers/hwtracing/coresight/coresight-tmc-etf.c index 467d19221f7b..789384be81b6 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etf.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etf.c @@ -71,7 +71,7 @@ static void tmc_etb_dump_hw(struct tmc_drvdata *drvdata) } } -void tmc_etb_disable_hw(struct tmc_drvdata *drvdata) +static void tmc_etb_disable_hw(struct tmc_drvdata *drvdata) { CS_UNLOCK(drvdata->base); @@ -202,3 +202,69 @@ const struct coresight_ops tmc_etf_cs_ops = { .sink_ops = &tmc_etf_sink_ops, .link_ops = &tmc_etf_link_ops, }; + +int tmc_read_prepare_etf(struct tmc_drvdata *drvdata) +{ + int ret = 0; + enum tmc_mode mode; + unsigned long flags; + + spin_lock_irqsave(&drvdata->spinlock, flags); + + /* The TMC isn't enable, so there is no need to disable it */ + if (!drvdata->enable) + goto out; + + if (drvdata->config_type != TMC_CONFIG_TYPE_ETB && + drvdata->config_type != TMC_CONFIG_TYPE_ETF) { + ret = -EINVAL; + goto out; + } + + /* There is no point in reading a TMC in HW FIFO mode */ + mode = readl_relaxed(drvdata->base + TMC_MODE); + if (mode != TMC_MODE_CIRCULAR_BUFFER) { + ret = -EINVAL; + goto out; + } + + tmc_etb_disable_hw(drvdata); + drvdata->reading = true; + +out: + spin_unlock_irqrestore(&drvdata->spinlock, flags); + return ret; +} + +int tmc_read_unprepare_etf(struct tmc_drvdata *drvdata) +{ + int ret = 0; + enum tmc_mode mode; + unsigned long flags; + + spin_lock_irqsave(&drvdata->spinlock, flags); + + /* The TMC isn't enable, so there is no need to enable it */ + if (!drvdata->enable) + goto out; + + if (drvdata->config_type != TMC_CONFIG_TYPE_ETB && + drvdata->config_type != TMC_CONFIG_TYPE_ETF) { + ret = -EINVAL; + goto out; + } + + /* There is no point in reading a TMC in HW FIFO mode */ + mode = readl_relaxed(drvdata->base + TMC_MODE); + if (mode != TMC_MODE_CIRCULAR_BUFFER) { + ret = -EINVAL; + goto out; + } + + tmc_etb_enable_hw(drvdata); + drvdata->reading = false; + +out: + spin_unlock_irqrestore(&drvdata->spinlock, flags); + return ret; +} diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c index 910d6f3b7d26..e1b43e0bd1dd 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c @@ -70,7 +70,7 @@ static void tmc_etr_dump_hw(struct tmc_drvdata *drvdata) drvdata->buf = drvdata->vaddr; } -void tmc_etr_disable_hw(struct tmc_drvdata *drvdata) +static void tmc_etr_disable_hw(struct tmc_drvdata *drvdata) { CS_UNLOCK(drvdata->base); @@ -126,3 +126,51 @@ static const struct coresight_ops_sink tmc_etr_sink_ops = { const struct coresight_ops tmc_etr_cs_ops = { .sink_ops = &tmc_etr_sink_ops, }; + +int tmc_read_prepare_etr(struct tmc_drvdata *drvdata) +{ + int ret = 0; + unsigned long flags; + + spin_lock_irqsave(&drvdata->spinlock, flags); + + /* The TMC isn't enable, so there is no need to disable it */ + if (!drvdata->enable) + goto out; + + if (drvdata->config_type != TMC_CONFIG_TYPE_ETR) { + ret = -EINVAL; + goto out; + } + + tmc_etr_disable_hw(drvdata); + drvdata->reading = true; + +out: + spin_unlock_irqrestore(&drvdata->spinlock, flags); + return ret; +} + +int tmc_read_unprepare_etr(struct tmc_drvdata *drvdata) +{ + int ret = 0; + unsigned long flags; + + spin_lock_irqsave(&drvdata->spinlock, flags); + + /* The TMC isn't enable, so there is no need to enable it */ + if (!drvdata->enable) + goto out; + + if (drvdata->config_type != TMC_CONFIG_TYPE_ETR) { + ret = -EINVAL; + goto out; + } + + tmc_etr_enable_hw(drvdata); + drvdata->reading = false; + +out: + spin_unlock_irqrestore(&drvdata->spinlock, flags); + return ret; +} diff --git a/drivers/hwtracing/coresight/coresight-tmc.c b/drivers/hwtracing/coresight/coresight-tmc.c index bc31131e4bd5..26dbef305851 100644 --- a/drivers/hwtracing/coresight/coresight-tmc.c +++ b/drivers/hwtracing/coresight/coresight-tmc.c @@ -75,76 +75,43 @@ void tmc_disable_hw(struct tmc_drvdata *drvdata) static int tmc_read_prepare(struct tmc_drvdata *drvdata) { int ret = 0; - unsigned long flags; - enum tmc_mode mode; - - spin_lock_irqsave(&drvdata->spinlock, flags); - if (!drvdata->enable) - goto out; switch (drvdata->config_type) { case TMC_CONFIG_TYPE_ETB: - tmc_etb_disable_hw(drvdata); - break; case TMC_CONFIG_TYPE_ETF: - /* There is no point in reading a TMC in HW FIFO mode */ - mode = readl_relaxed(drvdata->base + TMC_MODE); - if (mode != TMC_MODE_CIRCULAR_BUFFER) { - ret = -EINVAL; - goto err; - } - - tmc_etb_disable_hw(drvdata); + ret = tmc_read_prepare_etf(drvdata); break; case TMC_CONFIG_TYPE_ETR: - tmc_etr_disable_hw(drvdata); + ret = tmc_read_prepare_etr(drvdata); break; default: ret = -EINVAL; - goto err; } -out: - drvdata->reading = true; - dev_info(drvdata->dev, "TMC read start\n"); -err: - spin_unlock_irqrestore(&drvdata->spinlock, flags); + if (!ret) + dev_info(drvdata->dev, "TMC read start\n"); + return ret; } static void tmc_read_unprepare(struct tmc_drvdata *drvdata) { - unsigned long flags; - enum tmc_mode mode; - - spin_lock_irqsave(&drvdata->spinlock, flags); - if (!drvdata->enable) - goto out; + int ret = 0; switch (drvdata->config_type) { case TMC_CONFIG_TYPE_ETB: - tmc_etb_enable_hw(drvdata); - break; case TMC_CONFIG_TYPE_ETF: - /* Make sure we don't re-enable a TMC in HW FIFO mode */ - mode = readl_relaxed(drvdata->base + TMC_MODE); - if (mode != TMC_MODE_CIRCULAR_BUFFER) - goto err; - - tmc_etb_enable_hw(drvdata); + ret = tmc_read_unprepare_etf(drvdata); break; case TMC_CONFIG_TYPE_ETR: - tmc_etr_disable_hw(drvdata); + ret = tmc_read_unprepare_etr(drvdata); break; default: - goto err; + ret = -EINVAL; } -out: - drvdata->reading = false; - dev_info(drvdata->dev, "TMC read end\n"); -err: - spin_unlock_irqrestore(&drvdata->spinlock, flags); + if (!ret) + dev_info(drvdata->dev, "TMC read end\n"); } static int tmc_open(struct inode *inode, struct file *file) diff --git a/drivers/hwtracing/coresight/coresight-tmc.h b/drivers/hwtracing/coresight/coresight-tmc.h index b99d4dfc1d0b..6b11caf77ad1 100644 --- a/drivers/hwtracing/coresight/coresight-tmc.h +++ b/drivers/hwtracing/coresight/coresight-tmc.h @@ -128,13 +128,13 @@ void tmc_enable_hw(struct tmc_drvdata *drvdata); void tmc_disable_hw(struct tmc_drvdata *drvdata); /* ETB/ETF functions */ -void tmc_etb_enable_hw(struct tmc_drvdata *drvdata); -void tmc_etb_disable_hw(struct tmc_drvdata *drvdata); +int tmc_read_prepare_etf(struct tmc_drvdata *drvdata); +int tmc_read_unprepare_etf(struct tmc_drvdata *drvdata); extern const struct coresight_ops tmc_etb_cs_ops; extern const struct coresight_ops tmc_etf_cs_ops; /* ETR functions */ -void tmc_etr_enable_hw(struct tmc_drvdata *drvdata); -void tmc_etr_disable_hw(struct tmc_drvdata *drvdata); +int tmc_read_prepare_etr(struct tmc_drvdata *drvdata); +int tmc_read_unprepare_etr(struct tmc_drvdata *drvdata); extern const struct coresight_ops tmc_etr_cs_ops; #endif