From patchwork Tue Mar 22 20:23:10 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mathieu Poirier X-Patchwork-Id: 64204 Delivered-To: patch@linaro.org Received: by 10.112.199.169 with SMTP id jl9csp2295521lbc; Tue, 22 Mar 2016 13:25:33 -0700 (PDT) X-Received: by 10.66.254.168 with SMTP id aj8mr57254387pad.18.1458678333663; Tue, 22 Mar 2016 13:25:33 -0700 (PDT) Return-Path: Received: from bombadil.infradead.org (bombadil.infradead.org. [2001:1868:205::9]) by mx.google.com with ESMTPS id r75si6442643pfi.85.2016.03.22.13.25.33 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 22 Mar 2016 13:25:33 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:1868:205::9 as permitted sender) client-ip=2001:1868:205::9; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:1868:205::9 as permitted sender) smtp.mailfrom=linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org; dkim=neutral (body hash did not verify) header.i=@linaro.org Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1aiSqv-0008Mh-42; Tue, 22 Mar 2016 20:24:33 +0000 Received: from mail-io0-x232.google.com ([2607:f8b0:4001:c06::232]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1aiSqS-000879-4C for linux-arm-kernel@lists.infradead.org; Tue, 22 Mar 2016 20:24:05 +0000 Received: by mail-io0-x232.google.com with SMTP id m184so255392284iof.1 for ; Tue, 22 Mar 2016 13:23:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=pWI2bgJzLj+k/ruwV2r9M4mGIGtjkdjHgmQtfd0vT3Y=; b=cctty9VdTF/+vG8Jb8ebz9kdDT9+6q0VjYPYoZXaFdeSwVbCqf0zK+ouInxSIPajZz vbGszmMQsj1t8uGxWHeXuorJEVAMpfRwdxXN0j9KnHaGhZBIMocLkTZY2XqcwPE4Ww7R DLOB6L9cD36OGP1BuUzHRfyavXxRCXkRouJwI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=pWI2bgJzLj+k/ruwV2r9M4mGIGtjkdjHgmQtfd0vT3Y=; b=fPkSdrbEj8dJIGlDbtgoR8Yn35Ord/k4H/OWUV4VZEZCR7iK7kFZgjOrwkIzazSvsH uCuCVFYk8U4OheeO7X5L2LRTTimMoh8TgRBBDBkk+xJP8NLzfRi1/E8dt5Rh7xERDoj8 1QxTWdV0LImIzKPrCG+0BvqmWSIF6IGKXKaq8qtTvE2HJsVS0wk8vM6cB6n7xaWNeLd1 O4e4OUFv1y78lmD8n9hjiuEFB8vi6aUy/0wIlXdlRtWyvkSQCodHXBICWpDAexu7nmLj EuymfR+FGPgZ2L6fjn4YC/qrcEXP5n8pEhRA/rx/kQO4YzoxCDmZolcPzEPhjNNnaQh/ hUUw== X-Gm-Message-State: AD7BkJKd0wtZlFEo8dLxofDMvDTt3agT7mMx6sBuUR6ChTa+3QIBrZDxAFvSakrfShrRHsuc X-Received: by 10.107.136.77 with SMTP id k74mr41846849iod.0.1458678223101; Tue, 22 Mar 2016 13:23:43 -0700 (PDT) Received: from t430.cg.shawcable.net ([184.64.168.246]) by smtp.gmail.com with ESMTPSA id xo2sm8092061igb.0.2016.03.22.13.23.41 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 22 Mar 2016 13:23:42 -0700 (PDT) From: Mathieu Poirier To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 02/14] coresight: tmc: waiting for TMCReady bit before programming Date: Tue, 22 Mar 2016 14:23:10 -0600 Message-Id: <1458678202-3447-3-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1458678202-3447-1-git-send-email-mathieu.poirier@linaro.org> References: <1458678202-3447-1-git-send-email-mathieu.poirier@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160322_132404_359199_F1126920 X-CRM114-Status: GOOD ( 10.89 ) X-Spam-Score: -2.7 (--) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-2.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [2607:f8b0:4001:c06:0:0:0:232 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-kernel@vger.kernel.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org According to the TRM before programming the TMC in circular buffer mode (and that for any configuration, ETB, ETR, ETF), the TMCReady bit in the status register has to be set. This patch adds a check to make sure the state machine is in a state where it can be configured, and complains otherwise. Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-tmc.c | 9 +++++++++ 1 file changed, 9 insertions(+) -- 2.1.4 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel diff --git a/drivers/hwtracing/coresight/coresight-tmc.c b/drivers/hwtracing/coresight/coresight-tmc.c index 8a9e4d789bd8..f4ba837a0810 100644 --- a/drivers/hwtracing/coresight/coresight-tmc.c +++ b/drivers/hwtracing/coresight/coresight-tmc.c @@ -179,6 +179,9 @@ static void tmc_etb_enable_hw(struct tmc_drvdata *drvdata) CS_UNLOCK(drvdata->base); + /* Wait for TMCSReady bit to be set */ + tmc_wait_for_tmcready(drvdata); + writel_relaxed(TMC_MODE_CIRCULAR_BUFFER, drvdata->base + TMC_MODE); writel_relaxed(TMC_FFCR_EN_FMT | TMC_FFCR_EN_TI | TMC_FFCR_FON_FLIN | TMC_FFCR_FON_TRIG_EVT | @@ -200,6 +203,9 @@ static void tmc_etr_enable_hw(struct tmc_drvdata *drvdata) CS_UNLOCK(drvdata->base); + /* Wait for TMCSReady bit to be set */ + tmc_wait_for_tmcready(drvdata); + writel_relaxed(drvdata->size / 4, drvdata->base + TMC_RSZ); writel_relaxed(TMC_MODE_CIRCULAR_BUFFER, drvdata->base + TMC_MODE); @@ -229,6 +235,9 @@ static void tmc_etf_enable_hw(struct tmc_drvdata *drvdata) { CS_UNLOCK(drvdata->base); + /* Wait for TMCSReady bit to be set */ + tmc_wait_for_tmcready(drvdata); + writel_relaxed(TMC_MODE_HARDWARE_FIFO, drvdata->base + TMC_MODE); writel_relaxed(TMC_FFCR_EN_FMT | TMC_FFCR_EN_TI, drvdata->base + TMC_FFCR);