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[2001:1868:205::9]) by mx.google.com with ESMTPS id 83si9072947pfl.78.2016.03.22.13.25.29 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 22 Mar 2016 13:25:29 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:1868:205::9 as permitted sender) client-ip=2001:1868:205::9; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:1868:205::9 as permitted sender) smtp.mailfrom=linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org; dkim=neutral (body hash did not verify) header.i=@linaro.org Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1aiSqi-0008Hf-Sd; Tue, 22 Mar 2016 20:24:20 +0000 Received: from mail-io0-x229.google.com ([2607:f8b0:4001:c06::229]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1aiSqQ-00086U-DL for linux-arm-kernel@lists.infradead.org; Tue, 22 Mar 2016 20:24:03 +0000 Received: by mail-io0-x229.google.com with SMTP id 124so103055200iov.3 for ; Tue, 22 Mar 2016 13:23:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=72MooLWUX4LpO6QkJxACSgj4QxjJhlP3ymJerxSrgNo=; b=RuDvdawGihK40ZU0We8z8x7Wlb4dJcXi2fcjVKMhPIHXVk6VHEqm0qeTQXxY/nvFBu on6gGcB5C+LiH8mpAGO6HIzxYDi3Ga1ZAMqaGNtFPhOP66xlaw5cCHyuzPASkaOuLUp5 pYcnLkJ2kVNVHepM/8V8Av02jU9gKUe6KSGeM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=72MooLWUX4LpO6QkJxACSgj4QxjJhlP3ymJerxSrgNo=; b=ZysHlxmdcD1sFEaGoJZJ7v6/V9fSXMMNwDBIb5w4pbxGpNuvUqKzhZXQvwnvD23Qma EwEkQeEPWW8nAsoeWId82LtlT7u4m0hWLY5Qm35amslxsXK8srhBow6EUUi8mSLScr00 pnTreWpNNmJeXV9D1INNbPiPgveGMvlomQqOI2hlAcufdzNmWGU+1RoWDV9xQhH9Agwn RR95n6/cWVDeDlQpLacHBcFGvo7UqUlZFy/alJ9ORZSAorUjAdBcrm+7MLswaOsqe0zy cAFnZFVEng+WkmBgKUM4EF1bh0F6Ie4eJe2kfQ1vE5yQaTYmRLeFBLPwKBmPFLKsDUPR Y9Qw== X-Gm-Message-State: AD7BkJJouIPM5jr+9mIjuA0BcSX5WWiPZCqyNqxk2mGnaXw20K64i84NVAaRjw6BKQYwy46k X-Received: by 10.107.11.213 with SMTP id 82mr41187632iol.152.1458678221363; Tue, 22 Mar 2016 13:23:41 -0700 (PDT) Received: from t430.cg.shawcable.net ([184.64.168.246]) by smtp.gmail.com with ESMTPSA id xo2sm8092061igb.0.2016.03.22.13.23.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 22 Mar 2016 13:23:40 -0700 (PDT) From: Mathieu Poirier To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 01/14] coresight: tmc: modifying naming convention Date: Tue, 22 Mar 2016 14:23:09 -0600 Message-Id: <1458678202-3447-2-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1458678202-3447-1-git-send-email-mathieu.poirier@linaro.org> References: <1458678202-3447-1-git-send-email-mathieu.poirier@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160322_132402_559277_9E643963 X-CRM114-Status: GOOD ( 13.57 ) X-Spam-Score: -2.7 (--) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-2.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [2607:f8b0:4001:c06:0:0:0:229 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-kernel@vger.kernel.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org According to the TMC architectural state machine, the 'stopped' state is reached when bit 2 (TMCReady) of the TMC Status register turns to '1'. The code is correct but the naming convention isn't. The 'Triggered' bit occupies position '1' of the TMC Status register and has nothing to do with the indication of the TMC entering the stopped state. As such renaming function "tmc_wait_for_triggered()" and changing the #define to reflect what the code is really doing. This patch has no effect other than clarifying the semantic. Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-tmc.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) -- 2.1.4 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel diff --git a/drivers/hwtracing/coresight/coresight-tmc.c b/drivers/hwtracing/coresight/coresight-tmc.c index f0a67f984591..8a9e4d789bd8 100644 --- a/drivers/hwtracing/coresight/coresight-tmc.c +++ b/drivers/hwtracing/coresight/coresight-tmc.c @@ -76,7 +76,7 @@ #define TMC_FFCR_TRIGON_TRIGIN BIT(8) #define TMC_FFCR_STOP_ON_FLUSH BIT(12) -#define TMC_STS_TRIGGERED_BIT 2 +#define TMC_STS_TMCREADY_BIT 2 #define TMC_FFCR_FLUSHMAN_BIT 6 enum tmc_config_type { @@ -131,11 +131,11 @@ struct tmc_drvdata { u32 trigger_cntr; }; -static void tmc_wait_for_ready(struct tmc_drvdata *drvdata) +static void tmc_wait_for_tmcready(struct tmc_drvdata *drvdata) { /* Ensure formatter, unformatter and hardware fifo are empty */ if (coresight_timeout(drvdata->base, - TMC_STS, TMC_STS_TRIGGERED_BIT, 1)) { + TMC_STS, TMC_STS_TMCREADY_BIT, 1)) { dev_err(drvdata->dev, "timeout observed when probing at offset %#x\n", TMC_STS); @@ -159,7 +159,7 @@ static void tmc_flush_and_stop(struct tmc_drvdata *drvdata) TMC_FFCR); } - tmc_wait_for_ready(drvdata); + tmc_wait_for_tmcready(drvdata); } static void tmc_enable_hw(struct tmc_drvdata *drvdata)