From patchwork Thu Feb 11 14:34:21 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Auger Eric X-Patchwork-Id: 61780 Delivered-To: patches@linaro.org Received: by 10.112.43.199 with SMTP id y7csp233069lbl; Thu, 11 Feb 2016 06:42:19 -0800 (PST) X-Received: by 10.28.227.213 with SMTP id a204mr18839597wmh.2.1455201349759; Thu, 11 Feb 2016 06:35:49 -0800 (PST) Return-Path: Received: from mail-wm0-x22e.google.com (mail-wm0-x22e.google.com. [2a00:1450:400c:c09::22e]) by mx.google.com with ESMTPS id sb11si7277342wjb.55.2016.02.11.06.35.49 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 11 Feb 2016 06:35:49 -0800 (PST) Received-SPF: pass (google.com: domain of eric.auger@linaro.org designates 2a00:1450:400c:c09::22e as permitted sender) client-ip=2a00:1450:400c:c09::22e; Authentication-Results: mx.google.com; spf=pass (google.com: domain of eric.auger@linaro.org designates 2a00:1450:400c:c09::22e as permitted sender) smtp.mailfrom=eric.auger@linaro.org; dkim=pass header.i=@linaro.org Received: by mail-wm0-x22e.google.com with SMTP id p63so71019884wmp.1 for ; Thu, 11 Feb 2016 06:35:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=RWEO7BZjiO141e212eVuO6jwWruS6pnKguk05Kd81hs=; b=RrBJi1gOMIaEWzAcT6L4toZVE2wG9kiE2BKJ3f92POfhoXN1vaTehtw7Owyw4yp7JI O8KIwCvJ5HvJurbvYE+srog6lkjiTr5jE3Eh0y03o5ei0PnLHMpYPvw+NxuuwwnzYRGN LylHp1uwnDaAKPU0FgYyfySaWAVY+cdKtrhUI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=RWEO7BZjiO141e212eVuO6jwWruS6pnKguk05Kd81hs=; b=bBYNWTGZ4fukbQ5+ifAVFDtUa1lxzPjOxjRajy02JOVCcwMDHQ3bz+g5xqVEDktPN0 /N2uVnURVzDD2Agix8w5SXJY6S68Dy61QfVjRtoUfnmaoBZbChdUYpoKV5z2LzhbIpw3 Cn0+vdD0lHisRnP/B8YseHvEOvspQiZWPz0bLIaooDkVjkoOWNoY3aa3W6Sm4JAOzzys 4/vGkVxldPK2FgfGKeKgFFNAZgt9s45DY5NRZnN+Cb68J6bEN6bu8byetMj1b+widj2a EvUSASonmzineRZ6mpKNIhkBxlyMCbHT9UKvZKt0LELecD+iUf/VCylTPRPSsv5A5S5L Odrw== X-Gm-Message-State: AG10YOSbkWcWE1FOlJVXbyF6RbTp7x1M9JbiM0GOujWpfEXywmKx/xRF3RUYRr5rB5WlAt1+OA0= X-Received: by 10.28.187.134 with SMTP id l128mr17545536wmf.61.1455201349539; Thu, 11 Feb 2016 06:35:49 -0800 (PST) Return-Path: Received: from new-host-12.home (LMontsouris-657-1-37-90.w80-11.abo.wanadoo.fr. [80.11.198.90]) by smtp.gmail.com with ESMTPSA id t205sm8290751wmt.23.2016.02.11.06.35.45 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 11 Feb 2016 06:35:47 -0800 (PST) From: Eric Auger To: eric.auger@st.com, eric.auger@linaro.org, alex.williamson@redhat.com, will.deacon@arm.com, joro@8bytes.org, tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com, christoffer.dall@linaro.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org Cc: suravee.suthikulpanit@amd.com, patches@linaro.org, linux-kernel@vger.kernel.org, Manish.Jaggi@caviumnetworks.com, Bharat.Bhushan@freescale.com, pranav.sawargaonkar@gmail.com, p.fedin@samsung.com, iommu@lists.linux-foundation.org, sherry.hurwitz@amd.com, brijesh.singh@amd.com, leo.duran@amd.com, Thomas.Lendacky@amd.com Subject: [RFC v2 14/15] iommu/arm-smmu: do not advertise IOMMU_CAP_INTR_REMAP Date: Thu, 11 Feb 2016 14:34:21 +0000 Message-Id: <1455201262-5259-15-git-send-email-eric.auger@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1455201262-5259-1-git-send-email-eric.auger@linaro.org> References: <1455201262-5259-1-git-send-email-eric.auger@linaro.org> Do not advertise IOMMU_CAP_INTR_REMAP for arm-smmu. Indeed the irq_remapping capability is abstracted on irqchip side for ARM as opposed to Intel IOMMU featuring IRQ remapping HW. So to check IRQ remmapping capability, the msi domain needs to be checked instead. Signed-off-by: Eric Auger --- drivers/iommu/arm-smmu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 1.9.1 diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index ae8a97d..9a83285 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -1354,7 +1354,7 @@ static bool arm_smmu_capable(enum iommu_cap cap) */ return true; case IOMMU_CAP_INTR_REMAP: - return true; /* MSIs are just memory writes */ + return false; /* MSIs are just memory writes */ case IOMMU_CAP_NOEXEC: return true; default: