From patchwork Tue Jan 26 13:12:40 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Auger Eric X-Patchwork-Id: 60452 Delivered-To: patches@linaro.org Received: by 10.112.130.2 with SMTP id oa2csp1948973lbb; Tue, 26 Jan 2016 05:13:25 -0800 (PST) X-Received: by 10.194.184.112 with SMTP id et16mr22967095wjc.124.1453814005528; Tue, 26 Jan 2016 05:13:25 -0800 (PST) Return-Path: Received: from mail-wm0-x22b.google.com (mail-wm0-x22b.google.com. [2a00:1450:400c:c09::22b]) by mx.google.com with ESMTPS id v126si5477395wmg.9.2016.01.26.05.13.25 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 26 Jan 2016 05:13:25 -0800 (PST) Received-SPF: pass (google.com: domain of eric.auger@linaro.org designates 2a00:1450:400c:c09::22b as permitted sender) client-ip=2a00:1450:400c:c09::22b; Authentication-Results: mx.google.com; spf=pass (google.com: domain of eric.auger@linaro.org designates 2a00:1450:400c:c09::22b as permitted sender) smtp.mailfrom=eric.auger@linaro.org; dkim=pass header.i=@linaro.org Received: by mail-wm0-x22b.google.com with SMTP id l65so103469432wmf.1 for ; Tue, 26 Jan 2016 05:13:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=qQ6p58dFhesnD9QnUjr0DxV0Cq/VjktIK2EUEzaIf2c=; b=aRQlJzXFTdMBHTkV/t//gct3J3UaKLcATrbhTkJNWe41tNu4dNXh8CwS9q6FWyyz6D AkuDGzydxPV5VH9yfgZ+9mJVDf9qgXOZ58wBDyBCsOpiEZN7KQlP0YsDprnlIEFCNk8m v3BT16L1YjZVrT89mghKuvZ4w/hE8VZqlgZMU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=qQ6p58dFhesnD9QnUjr0DxV0Cq/VjktIK2EUEzaIf2c=; b=eYEJzueQDJmzTkCm7Lr8rzseryD+4rBlUmozBRr/X81S5UK++AuBOUnBKdbjPpDw0Q yaZCQyAeJERlcG9Vi0Z0UdOji0gz1+mqEWAQHT2b2fHUc2f8fuZlEx1VqMSMP0h19ZXK 5od/rdMWR08Pn23BUmnfIPtlLNN9t4ab8RiBvz/61FUzRhxRoj+UM6KWuqIzyzmDh+Zl 0XYelCXbV8qN0b6V2sWx4bY/ZBHPKfmwslHbirr/bgXYSUhzAAqu3jtzCDaStliRjxjs 8lnjhZ1BKa5QsGyX+xddUmykS5DTBLVztuGaj1YhsMxsJ7Jp6QkzgN22oIdj/bZOcIfI pEZg== X-Gm-Message-State: AG10YOQILjxU8dTWUmlUbcJoZJrf3mDPEuxBP0PC4UiKGKagrXu+nRzoY0n1wR7FoKMphr3W8MY= X-Received: by 10.28.142.8 with SMTP id q8mr23806567wmd.47.1453814005302; Tue, 26 Jan 2016 05:13:25 -0800 (PST) Return-Path: Received: from localhost.localdomain (LMontsouris-657-1-37-90.w80-11.abo.wanadoo.fr. [80.11.198.90]) by smtp.gmail.com with ESMTPSA id ct2sm1388885wjb.46.2016.01.26.05.13.22 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 26 Jan 2016 05:13:23 -0800 (PST) From: Eric Auger To: eric.auger@st.com, eric.auger@linaro.org, alex.williamson@redhat.com, will.deacon@arm.com, christoffer.dall@linaro.org, marc.zyngier@arm.com, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org Cc: Bharat.Bhushan@freescale.com, pranav.sawargaonkar@gmail.com, p.fedin@samsung.com, suravee.suthikulpanit@amd.com, linux-kernel@vger.kernel.org, patches@linaro.org, iommu@lists.linux-foundation.org Subject: [PATCH 02/10] vfio: expose MSI mapping requirement through VFIO_IOMMU_GET_INFO Date: Tue, 26 Jan 2016 13:12:40 +0000 Message-Id: <1453813968-2024-3-git-send-email-eric.auger@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1453813968-2024-1-git-send-email-eric.auger@linaro.org> References: <1453813968-2024-1-git-send-email-eric.auger@linaro.org> This patch allows the user-space to retrieve whether msi write transaction addresses must be mapped. This is returned through the VFIO_IOMMU_GET_INFO API using a new flag: VFIO_IOMMU_INFO_REQUIRE_MSI_MAP. Signed-off-by: Bharat Bhushan Signed-off-by: Eric Auger --- RFC v1 -> RFC v2: - derived from [RFC PATCH 3/6] vfio: Extend iommu-info to return MSIs automap state - renamed allow_msi_reconfig into require_msi_mapping - fixed VFIO_IOMMU_GET_INFO --- drivers/vfio/vfio_iommu_type1.c | 26 ++++++++++++++++++++++++++ include/uapi/linux/vfio.h | 1 + 2 files changed, 27 insertions(+) -- 1.9.1 diff --git a/drivers/vfio/vfio_iommu_type1.c b/drivers/vfio/vfio_iommu_type1.c index 6f1ea3d..c5b57e1 100644 --- a/drivers/vfio/vfio_iommu_type1.c +++ b/drivers/vfio/vfio_iommu_type1.c @@ -255,6 +255,29 @@ static int vaddr_get_pfn(unsigned long vaddr, int prot, unsigned long *pfn) } /* + * vfio_domains_require_msi_mapping: indicates whether MSI write transaction + * addresses must be mapped + * + * returns true if it does + */ +static bool vfio_domains_require_msi_mapping(struct vfio_iommu *iommu) +{ + struct vfio_domain *d; + bool ret; + + mutex_lock(&iommu->lock); + /* All domains have same require_msi_map property, pick first */ + d = list_first_entry(&iommu->domain_list, struct vfio_domain, next); + if (iommu_domain_get_attr(d->domain, DOMAIN_ATTR_MSI_MAPPING, NULL) < 0) + ret = false; + else + ret = true; + mutex_unlock(&iommu->lock); + + return ret; +} + +/* * Attempt to pin pages. We really don't want to track all the pfns and * the iommu can only map chunks of consecutive pfns anyway, so get the * first page and all consecutive pages with the same locking. @@ -997,6 +1020,9 @@ static long vfio_iommu_type1_ioctl(void *iommu_data, info.flags = VFIO_IOMMU_INFO_PGSIZES; + if (vfio_domains_require_msi_mapping(iommu)) + info.flags |= VFIO_IOMMU_INFO_REQUIRE_MSI_MAP; + info.iova_pgsizes = vfio_pgsize_bitmap(iommu); return copy_to_user((void __user *)arg, &info, minsz); diff --git a/include/uapi/linux/vfio.h b/include/uapi/linux/vfio.h index 7d7a4c6..43e183b 100644 --- a/include/uapi/linux/vfio.h +++ b/include/uapi/linux/vfio.h @@ -400,6 +400,7 @@ struct vfio_iommu_type1_info { __u32 argsz; __u32 flags; #define VFIO_IOMMU_INFO_PGSIZES (1 << 0) /* supported page sizes info */ +#define VFIO_IOMMU_INFO_REQUIRE_MSI_MAP (1 << 1)/* MSI must be mapped */ __u64 iova_pgsizes; /* Bitmap of supported page sizes */ };