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[80.11.198.90]) by smtp.gmail.com with ESMTPSA id ct2sm1388885wjb.46.2016.01.26.05.13.19 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 26 Jan 2016 05:13:21 -0800 (PST) From: Eric Auger To: eric.auger@st.com, eric.auger@linaro.org, alex.williamson@redhat.com, will.deacon@arm.com, christoffer.dall@linaro.org, marc.zyngier@arm.com, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org Cc: Bharat.Bhushan@freescale.com, pranav.sawargaonkar@gmail.com, p.fedin@samsung.com, suravee.suthikulpanit@amd.com, linux-kernel@vger.kernel.org, patches@linaro.org, iommu@lists.linux-foundation.org Subject: [PATCH 01/10] iommu: Add DOMAIN_ATTR_MSI_MAPPING attribute Date: Tue, 26 Jan 2016 13:12:39 +0000 Message-Id: <1453813968-2024-2-git-send-email-eric.auger@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1453813968-2024-1-git-send-email-eric.auger@linaro.org> References: <1453813968-2024-1-git-send-email-eric.auger@linaro.org> Introduce new DOMAIN_ATTR_MSI_MAPPING domain attribute. If supported, this means the MSI addresses need to be mapped in the IOMMU. ARM SMMUS and FSL PAMU, at least expose this attribute. x86 IOMMUs typically don't expose the attribute since on x86 MSI write transaction addresses always are within the 1MB PA region [FEE0_0000h - FEF0_000h] window which directly targets the APIC configuration space and hence bypass the sMMU. Signed-off-by: Bharat Bhushan Signed-off-by: Eric Auger --- to be honest I wonder whether this is property of the sMMU? Isn't it a platform property? RFC v1 -> RFC v2: - the data field is not used - for this attribute domain_get_attr simply returns 0 if the MSI_MAPPING capability if needed or <0 if not. - removed struct iommu_domain_msi_maps --- drivers/iommu/arm-smmu.c | 2 ++ drivers/iommu/fsl_pamu_domain.c | 3 +++ include/linux/iommu.h | 1 + 3 files changed, 6 insertions(+) -- 1.9.1 diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index 59ee4b8..c8b7e71 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -1409,6 +1409,8 @@ static int arm_smmu_domain_get_attr(struct iommu_domain *domain, case DOMAIN_ATTR_NESTING: *(int *)data = (smmu_domain->stage == ARM_SMMU_DOMAIN_NESTED); return 0; + case DOMAIN_ATTR_MSI_MAPPING: + return 0; default: return -ENODEV; } diff --git a/drivers/iommu/fsl_pamu_domain.c b/drivers/iommu/fsl_pamu_domain.c index da0e1e3..dd2e0d6 100644 --- a/drivers/iommu/fsl_pamu_domain.c +++ b/drivers/iommu/fsl_pamu_domain.c @@ -856,6 +856,9 @@ static int fsl_pamu_get_domain_attr(struct iommu_domain *domain, case DOMAIN_ATTR_FSL_PAMUV1: *(int *)data = DOMAIN_ATTR_FSL_PAMUV1; break; + case DOMAIN_ATTR_MSI_MAPPING: + ret = 0; + break; default: pr_debug("Unsupported attribute type\n"); ret = -EINVAL; diff --git a/include/linux/iommu.h b/include/linux/iommu.h index f28dff3..3ae2fb6 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -112,6 +112,7 @@ enum iommu_attr { DOMAIN_ATTR_FSL_PAMU_ENABLE, DOMAIN_ATTR_FSL_PAMUV1, DOMAIN_ATTR_NESTING, /* two stages of translation */ + DOMAIN_ATTR_MSI_MAPPING, /* Require MSIs mapping in iommu */ DOMAIN_ATTR_MAX, };