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[2001:1868:205::9]) by mx.google.com with ESMTPS id w72si1386973pfi.218.2016.01.26.03.16.37 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 26 Jan 2016 03:16:37 -0800 (PST) Received-SPF: pass (google.com: domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:1868:205::9 as permitted sender) client-ip=2001:1868:205::9; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:1868:205::9 as permitted sender) smtp.mailfrom=linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org; dkim=neutral (body hash did not verify) header.i=@linaro.org Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1aO1ah-00058J-KU; Tue, 26 Jan 2016 11:15:19 +0000 Received: from mail-lb0-x235.google.com ([2a00:1450:4010:c04::235]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1aO1YS-0002PI-2d for linux-arm-kernel@lists.infradead.org; Tue, 26 Jan 2016 11:13:04 +0000 Received: by mail-lb0-x235.google.com with SMTP id cl12so89652989lbc.1 for ; Tue, 26 Jan 2016 03:12:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=GkLdei8eYnAy0qTLdOnA6izv/ghvd4dPkuu+w8WgOW4=; b=ewY7e5oKxEU18Pqi5m2/9t9tp/6i1LIC3n7PTQ4cuoSVc3R7Qwu2JGSi6Y5JeR6iqB wPFkfvXx37FIwE4jg6DEu7TLrebVgTfyVxBzv3iSGpfbKAtWYdIuLwo12I9ordo5fEZ8 eAw1c1xjl5rgJ5TRQk7HyhN054v67b5YXPS8A= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=GkLdei8eYnAy0qTLdOnA6izv/ghvd4dPkuu+w8WgOW4=; b=DH8+Mfj+GN9RPc5xKdzntSMpAhLj1r1BPF6fN9/L1qESm2ec4+m+eBgSLy+g4gSRBQ /7Jr+mbKPRYPlNcsiZtETc4/y6pgyG8JGlagE3HpnXlInzwPhZn6z5hpTQE39ZhIjKqK vo3X9QGfBvT0qh1juKUaeF5nSpB8V9NCsgLp9HQTHt3AHecz36uOJov93qzUuo8fTLUr ejxvl6Lm5DR+RjaYclE6GYUPLtNPAyqDoK1LVXsj5kmXsEMIVQqj5QoukrpdS/FQqSci DRo4LVjRnNJr/GS9GApXsKgb3GJG0ggQMBpzTgeVZhZESTCEvVs5SwxEpbU/CFnjZbiF 79+w== X-Gm-Message-State: AG10YOTkOwKHxzhFDB9ZsiKPmUAi1tRt7nKEAOHxV0SOR1qPayDfO7Eqpx/6iX/fLbSh3qgB X-Received: by 10.112.198.131 with SMTP id jc3mr8554764lbc.118.1453806762915; Tue, 26 Jan 2016 03:12:42 -0800 (PST) Received: from localhost.localdomain ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id i192sm119832lfb.14.2016.01.26.03.12.41 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 26 Jan 2016 03:12:42 -0800 (PST) From: Linus Walleij To: David Woodhouse , Brian Norris , linux-mtd@lists.infradead.org Subject: [PATCH 4/6] ARM: integrator: move flash registration to device tree Date: Tue, 26 Jan 2016 12:12:03 +0100 Message-Id: <1453806725-4880-5-git-send-email-linus.walleij@linaro.org> X-Mailer: git-send-email 2.4.3 In-Reply-To: <1453806725-4880-1-git-send-email-linus.walleij@linaro.org> References: <1453806725-4880-1-git-send-email-linus.walleij@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160126_031300_694193_E3132454 X-CRM114-Status: GOOD ( 21.60 ) X-Spam-Score: -2.7 (--) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-2.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [2a00:1450:4010:c04:0:0:0:235 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Grant Likely , Linus Walleij , Arnd Bergmann , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org The flash on the Integrator was already defined by the device tree, but VPP control and flash protection was in the boardfiles. Simply add the compatible string "arm,versatile-flash" and the special add-on code for flash programming voltage and protection kicks in in the MTD layer. Remove the board file code and augment the device tree in one go for seamless transition. Cc: Grant Likely Cc: Rob Herring Cc: Arnd Bergmann Signed-off-by: Linus Walleij --- arch/arm/boot/dts/integrator.dtsi | 3 +- arch/arm/mach-integrator/integrator_ap.c | 62 -------------------------------- arch/arm/mach-integrator/integrator_cp.c | 51 -------------------------- 3 files changed, 2 insertions(+), 114 deletions(-) -- 2.4.3 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel diff --git a/arch/arm/boot/dts/integrator.dtsi b/arch/arm/boot/dts/integrator.dtsi index 3807d4f46ef7..adc4befea46d 100644 --- a/arch/arm/boot/dts/integrator.dtsi +++ b/arch/arm/boot/dts/integrator.dtsi @@ -52,8 +52,9 @@ }; flash@24000000 { - compatible = "cfi-flash"; + compatible = "arm,versatile-flash", "cfi-flash"; reg = <0x24000000 0x02000000>; + bank-width = <4>; }; fpga { diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c index 5b0e363fe5ba..2b118f20c62c 100644 --- a/arch/arm/mach-integrator/integrator_ap.c +++ b/arch/arm/mach-integrator/integrator_ap.c @@ -29,7 +29,6 @@ #include #include #include -#include #include #include #include @@ -147,65 +146,6 @@ static int __init irq_syscore_init(void) device_initcall(irq_syscore_init); /* - * Flash handling. - */ -static int ap_flash_init(struct platform_device *dev) -{ - u32 tmp; - - writel(INTEGRATOR_SC_CTRL_nFLVPPEN | INTEGRATOR_SC_CTRL_nFLWP, - ap_syscon_base + INTEGRATOR_SC_CTRLC_OFFSET); - - tmp = readl(ebi_base + INTEGRATOR_EBI_CSR1_OFFSET) | - INTEGRATOR_EBI_WRITE_ENABLE; - writel(tmp, ebi_base + INTEGRATOR_EBI_CSR1_OFFSET); - - if (!(readl(ebi_base + INTEGRATOR_EBI_CSR1_OFFSET) - & INTEGRATOR_EBI_WRITE_ENABLE)) { - writel(0xa05f, ebi_base + INTEGRATOR_EBI_LOCK_OFFSET); - writel(tmp, ebi_base + INTEGRATOR_EBI_CSR1_OFFSET); - writel(0, ebi_base + INTEGRATOR_EBI_LOCK_OFFSET); - } - return 0; -} - -static void ap_flash_exit(struct platform_device *dev) -{ - u32 tmp; - - writel(INTEGRATOR_SC_CTRL_nFLVPPEN | INTEGRATOR_SC_CTRL_nFLWP, - ap_syscon_base + INTEGRATOR_SC_CTRLC_OFFSET); - - tmp = readl(ebi_base + INTEGRATOR_EBI_CSR1_OFFSET) & - ~INTEGRATOR_EBI_WRITE_ENABLE; - writel(tmp, ebi_base + INTEGRATOR_EBI_CSR1_OFFSET); - - if (readl(ebi_base + INTEGRATOR_EBI_CSR1_OFFSET) & - INTEGRATOR_EBI_WRITE_ENABLE) { - writel(0xa05f, ebi_base + INTEGRATOR_EBI_LOCK_OFFSET); - writel(tmp, ebi_base + INTEGRATOR_EBI_CSR1_OFFSET); - writel(0, ebi_base + INTEGRATOR_EBI_LOCK_OFFSET); - } -} - -static void ap_flash_set_vpp(struct platform_device *pdev, int on) -{ - if (on) - writel(INTEGRATOR_SC_CTRL_nFLVPPEN, - ap_syscon_base + INTEGRATOR_SC_CTRLS_OFFSET); - else - writel(INTEGRATOR_SC_CTRL_nFLVPPEN, - ap_syscon_base + INTEGRATOR_SC_CTRLC_OFFSET); -} - -static struct physmap_flash_data ap_flash_data = { - .width = 4, - .init = ap_flash_init, - .exit = ap_flash_exit, - .set_vpp = ap_flash_set_vpp, -}; - -/* * For the PL010 found in the Integrator/AP some of the UART control is * implemented in the system controller and accessed using a callback * from the driver. @@ -266,8 +206,6 @@ static struct of_dev_auxdata ap_auxdata_lookup[] __initdata = { "kmi0", NULL), OF_DEV_AUXDATA("arm,primecell", KMI1_BASE, "kmi1", NULL), - OF_DEV_AUXDATA("cfi-flash", INTEGRATOR_FLASH_BASE, - "physmap-flash", &ap_flash_data), { /* sentinel */ }, }; diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c index b5fb71a36ee6..6f6b051e81e0 100644 --- a/arch/arm/mach-integrator/integrator_cp.c +++ b/arch/arm/mach-integrator/integrator_cp.c @@ -23,7 +23,6 @@ #include #include #include -#include #include #include #include @@ -43,14 +42,8 @@ /* Base address to the CP controller */ static void __iomem *intcp_con_base; -#define INTCP_PA_FLASH_BASE 0x24000000 - #define INTCP_PA_CLCD_BASE 0xc0000000 -#define INTCP_FLASHPROG 0x04 -#define CINTEGRATOR_FLASHPROG_FLVPPEN (1 << 0) -#define CINTEGRATOR_FLASHPROG_FLWREN (1 << 1) - /* * Logical Physical * f1000000 10000000 Core module registers @@ -108,48 +101,6 @@ static void __init intcp_map_io(void) } /* - * Flash handling. - */ -static int intcp_flash_init(struct platform_device *dev) -{ - u32 val; - - val = readl(intcp_con_base + INTCP_FLASHPROG); - val |= CINTEGRATOR_FLASHPROG_FLWREN; - writel(val, intcp_con_base + INTCP_FLASHPROG); - - return 0; -} - -static void intcp_flash_exit(struct platform_device *dev) -{ - u32 val; - - val = readl(intcp_con_base + INTCP_FLASHPROG); - val &= ~(CINTEGRATOR_FLASHPROG_FLVPPEN|CINTEGRATOR_FLASHPROG_FLWREN); - writel(val, intcp_con_base + INTCP_FLASHPROG); -} - -static void intcp_flash_set_vpp(struct platform_device *pdev, int on) -{ - u32 val; - - val = readl(intcp_con_base + INTCP_FLASHPROG); - if (on) - val |= CINTEGRATOR_FLASHPROG_FLVPPEN; - else - val &= ~CINTEGRATOR_FLASHPROG_FLVPPEN; - writel(val, intcp_con_base + INTCP_FLASHPROG); -} - -static struct physmap_flash_data intcp_flash_data = { - .width = 4, - .init = intcp_flash_init, - .exit = intcp_flash_exit, - .set_vpp = intcp_flash_set_vpp, -}; - -/* * It seems that the card insertion interrupt remains active after * we've acknowledged it. We therefore ignore the interrupt, and * rely on reading it from the SIC. This also means that we must @@ -260,8 +211,6 @@ static struct of_dev_auxdata intcp_auxdata_lookup[] __initdata = { "aaci", &mmc_data), OF_DEV_AUXDATA("arm,primecell", INTCP_PA_CLCD_BASE, "clcd", &clcd_data), - OF_DEV_AUXDATA("cfi-flash", INTCP_PA_FLASH_BASE, - "physmap-flash", &intcp_flash_data), { /* sentinel */ }, };