From patchwork Wed Jan 6 11:05:26 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Rutland X-Patchwork-Id: 59234 Delivered-To: patch@linaro.org Received: by 10.112.130.2 with SMTP id oa2csp6510871lbb; Wed, 6 Jan 2016 03:07:25 -0800 (PST) X-Received: by 10.66.102.8 with SMTP id fk8mr73002712pab.24.1452078445301; Wed, 06 Jan 2016 03:07:25 -0800 (PST) Return-Path: Received: from bombadil.infradead.org (bombadil.infradead.org. [2001:1868:205::9]) by mx.google.com with ESMTPS id c10si1081284pat.36.2016.01.06.03.07.24 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 06 Jan 2016 03:07:25 -0800 (PST) Received-SPF: pass (google.com: domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:1868:205::9 as permitted sender) client-ip=2001:1868:205::9; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:1868:205::9 as permitted sender) smtp.mailfrom=linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1aGlv1-0003Z5-OP; Wed, 06 Jan 2016 11:06:19 +0000 Received: from foss.arm.com ([217.140.101.70]) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1aGluy-0003UT-1e for linux-arm-kernel@lists.infradead.org; Wed, 06 Jan 2016 11:06:16 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9631049; Wed, 6 Jan 2016 03:05:20 -0800 (PST) Received: from leverpostej.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 2D5153F308; Wed, 6 Jan 2016 03:05:52 -0800 (PST) From: Mark Rutland To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 1/2] arm64: add macro to handle large immediates Date: Wed, 6 Jan 2016 11:05:26 +0000 Message-Id: <1452078327-9635-1-git-send-email-mark.rutland@arm.com> X-Mailer: git-send-email 1.9.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160106_030616_110619_9DBA30B6 X-CRM114-Status: UNSURE ( 9.16 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -6.9 (------) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-6.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [217.140.101.70 listed in list.dnswl.org] -0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Catalin Marinas , Will Deacon , Marc Zyngier , Ard Biesheuvel MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org Sometimes we want to be able to load values greater than 0xff into a register, without placing said values in a literal pool. Arranging for the value to be split up across a number of movz and movk instructions is tedious and error-prone. Following the example of {adr,str,ldr}_l, this patch adds a new mov_l macro which can be used to load immediate values of up to 64 bits into a register. Signed-off-by: Mark Rutland Cc: Ard Biesheuvel Cc: Catalin Marinas Cc: Marc Zyngier Cc: Will Deacon --- arch/arm64/include/asm/assembler.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) -- 1.9.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h index 12eff92..64fd0a2 100644 --- a/arch/arm64/include/asm/assembler.h +++ b/arch/arm64/include/asm/assembler.h @@ -193,6 +193,19 @@ lr .req x30 // link register str \src, [\tmp, :lo12:\sym] .endm + /* + * Move a large immediate up to 64-bits. + * + * @dst: destination register (64 bit wide) + * @val: value + */ + .macro mov_l, dst, val + movz \dst, :abs_g0_nc:\val + movk \dst, :abs_g1_nc:\val + movk \dst, :abs_g2_nc:\val + movk \dst, :abs_g3:\val + .endm + /* * Annotate a function as position independent, i.e., safe to be called before * the kernel virtual mapping is activated.