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[184.64.168.246]) by smtp.gmail.com with ESMTPSA id d81sm3615433ioj.12.2015.12.03.13.05.43 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 03 Dec 2015 13:05:45 -0800 (PST) From: Mathieu Poirier To: gregkh@linuxfoundation.org, alexander.shishkin@linux.intel.com Subject: [PATCH V6 14/26] coresight: etm3x: adding perf_get/set_config() API Date: Thu, 3 Dec 2015 14:04:50 -0700 Message-Id: <1449176702-13213-15-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1449176702-13213-1-git-send-email-mathieu.poirier@linaro.org> References: <1449176702-13213-1-git-send-email-mathieu.poirier@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151203_130606_961616_FD2DEDF9 X-CRM114-Status: GOOD ( 20.44 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [2607:f8b0:4001:c06:0:0:0:231 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: al.grant@arm.com, Mathieu Poirier , linux-doc@vger.kernel.org, fainelli@broadcom.com, linux-kernel@vger.kernel.org, tor@ti.com, mike.leach@arm.com, zhang.chunyan@linaro.org, linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org Adding a source operation to build a tracer's configuration from a perf_event. That way possibly complex parsing of the information conveyed by the event doesn't have to be carried out every time the configuration is needed. Since event configuration can change between concurrent sessions, the possibility of associating a tracer with a configuration is also provided. As such Perf can assign session configuration to tracers as it see fit. Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/Kconfig | 1 + drivers/hwtracing/coresight/coresight-etm3x.c | 70 +++++++++++++++++++++++++++ include/linux/coresight.h | 9 +++- 3 files changed, 79 insertions(+), 1 deletion(-) -- 2.1.4 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel diff --git a/drivers/hwtracing/coresight/Kconfig b/drivers/hwtracing/coresight/Kconfig index 6c8921140f02..e252dd1522e5 100644 --- a/drivers/hwtracing/coresight/Kconfig +++ b/drivers/hwtracing/coresight/Kconfig @@ -4,6 +4,7 @@ menuconfig CORESIGHT bool "CoreSight Tracing Support" select ARM_AMBA + select PERF_EVENTS help This framework provides a kernel interface for the CoreSight debug and trace drivers to register themselves with. It's intended to build diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c index d0b77be51980..cda28e0211f5 100644 --- a/drivers/hwtracing/coresight/coresight-etm3x.c +++ b/drivers/hwtracing/coresight/coresight-etm3x.c @@ -31,6 +31,7 @@ #include #include #include +#include #include #include "coresight-etm.h" @@ -315,6 +316,40 @@ void etm_config_trace_mode(struct etm_drvdata *drvdata, config->addr_type[1] = ETM_ADDR_TYPE_RANGE; } +#define ETM3X_SUPPORTED_OPTIONS (ETMCR_CYC_ACC | ETMCR_TIMESTAMP_EN) + +static int etm_parse_event_config(struct etm_drvdata *drvdata, + struct etm_config *config, + struct perf_event *event) +{ + u32 mode = 0; + u64 event_config = event->attr.config; + + if (event->attr.exclude_kernel) + mode = ETM_MODE_EXCL_KERN; + + if (event->attr.exclude_user) + mode = ETM_MODE_EXCL_USER; + + /* + * By default the tracers are configured to trace the whole address + * range. Narrow the field only if requested by user space. + */ + if (mode) + etm_config_trace_mode(drvdata, config, mode); + + /* + * At this time only cycle accurate and timestamp options are + * available. + */ + if (event_config & ~ETM3X_SUPPORTED_OPTIONS) + return -EINVAL; + + config->ctrl = event_config; + + return 0; +} + static void etm_enable_hw(void *info) { int i; @@ -428,6 +463,38 @@ static int etm_trace_id(struct coresight_device *csdev) return etm_get_trace_id(drvdata); } +static void *etm_get_config(struct coresight_device *csdev, + struct perf_event *event) +{ + struct etm_config *config = NULL; + struct etm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); + + config = kzalloc(sizeof(struct etm_config), GFP_KERNEL); + if (!config) + return config; + + etm_set_default(config); + + if (etm_parse_event_config(drvdata, config, event)) + return ERR_PTR(-EINVAL); + + return config; +} + +static void etm_put_config(void *config) +{ + struct etm_config *cfg = config; + + kfree(cfg); +} + +static void etm_set_config(struct coresight_device *csdev, void *config) +{ + struct etm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); + + drvdata->config = config; +} + static int etm_enable_sysfs(struct coresight_device *csdev) { struct etm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); @@ -569,6 +636,9 @@ static void etm_disable(struct coresight_device *csdev) static const struct coresight_ops_source etm_source_ops = { .cpu_id = etm_cpu_id, .trace_id = etm_trace_id, + .get_config = etm_get_config, + .put_config = etm_put_config, + .set_config = etm_set_config, .enable = etm_enable, .disable = etm_disable, }; diff --git a/include/linux/coresight.h b/include/linux/coresight.h index 61dfb8d511ea..da242dfebdbd 100644 --- a/include/linux/coresight.h +++ b/include/linux/coresight.h @@ -206,13 +206,20 @@ struct coresight_ops_link { * @cpu_id: returns the value of the CPU number this component * is associated to. * @trace_id: returns the value of the component's trace ID as known - to the HW. + * to the HW. + * @get_config: builds the ETM configuration after events' specifics. + * @put_config: release memory allocated in @get_config. + * @set_config: associate a tracer with a configuration. * @enable: enables tracing for a source. * @disable: disables tracing for a source. */ struct coresight_ops_source { int (*cpu_id)(struct coresight_device *csdev); int (*trace_id)(struct coresight_device *csdev); + void *(*get_config)(struct coresight_device *csdev, + struct perf_event *event); + void (*put_config)(void *config); + void (*set_config)(struct coresight_device *csdev, void *config); int (*enable)(struct coresight_device *csdev, u32 mode); void (*disable)(struct coresight_device *csdev); };