From patchwork Thu Dec 3 06:11:29 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shannon Zhao X-Patchwork-Id: 57601 Delivered-To: patch@linaro.org Received: by 10.112.155.196 with SMTP id vy4csp3314064lbb; Wed, 2 Dec 2015 22:17:54 -0800 (PST) X-Received: by 10.66.156.106 with SMTP id wd10mr10775903pab.150.1449123474695; Wed, 02 Dec 2015 22:17:54 -0800 (PST) Return-Path: Received: from bombadil.infradead.org (bombadil.infradead.org. [2001:1868:205::9]) by mx.google.com with ESMTPS id lr5si9831327pab.147.2015.12.02.22.17.54 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 02 Dec 2015 22:17:54 -0800 (PST) Received-SPF: pass (google.com: domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:1868:205::9 as permitted sender) client-ip=2001:1868:205::9; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:1868:205::9 as permitted sender) smtp.mailfrom=linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1a4NBj-0002MP-JQ; Thu, 03 Dec 2015 06:16:19 +0000 Received: from szxga03-in.huawei.com ([119.145.14.66]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1a4N9U-0007iH-U4 for linux-arm-kernel@lists.infradead.org; Thu, 03 Dec 2015 06:14:08 +0000 Received: from 172.24.1.49 (EHLO szxeml426-hub.china.huawei.com) ([172.24.1.49]) by szxrg03-dlp.huawei.com (MOS 4.4.3-GA FastPath queued) with ESMTP id BRZ97011; Thu, 03 Dec 2015 14:12:43 +0800 (CST) Received: from HGHY1Z002260041.china.huawei.com (10.177.16.142) by szxeml426-hub.china.huawei.com (10.82.67.181) with Microsoft SMTP Server id 14.3.235.1; Thu, 3 Dec 2015 14:12:33 +0800 From: Shannon Zhao To: , , Subject: [PATCH v5 19/21] KVM: ARM64: Reset PMU state when resetting vcpu Date: Thu, 3 Dec 2015 14:11:29 +0800 Message-ID: <1449123091-20252-20-git-send-email-zhaoshenglong@huawei.com> X-Mailer: git-send-email 1.9.0.msysgit.0 In-Reply-To: <1449123091-20252-1-git-send-email-zhaoshenglong@huawei.com> References: <1449123091-20252-1-git-send-email-zhaoshenglong@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.16.142] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A090202.565FDD5B.009A, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2013-05-26 15:14:31, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 446434666b7942d65793674d6d52fe53 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151202_221405_324498_4EAF3D7A X-CRM114-Status: GOOD ( 12.08 ) X-Spam-Score: -4.2 (----) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-4.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [119.145.14.66 listed in list.dnswl.org] -0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3) [119.145.14.66 listed in wl.mailspike.net] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 T_RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.0 RCVD_IN_MSPIKE_WL Mailspike good senders X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: wei@redhat.com, hangaohuai@huawei.com, kvm@vger.kernel.org, will.deacon@arm.com, peter.huangpeng@huawei.com, cov@codeaurora.org, zhaoshenglong@huawei.com, alex.bennee@linaro.org, linux-arm-kernel@lists.infradead.org, shannon.zhao@linaro.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org From: Shannon Zhao When resetting vcpu, it needs to reset the PMU state to initial status. Signed-off-by: Shannon Zhao --- arch/arm64/kvm/reset.c | 3 +++ include/kvm/arm_pmu.h | 2 ++ virt/kvm/arm/pmu.c | 18 ++++++++++++++++++ 3 files changed, 23 insertions(+) -- 2.0.4 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel diff --git a/arch/arm64/kvm/reset.c b/arch/arm64/kvm/reset.c index f34745c..dfbce78 100644 --- a/arch/arm64/kvm/reset.c +++ b/arch/arm64/kvm/reset.c @@ -120,6 +120,9 @@ int kvm_reset_vcpu(struct kvm_vcpu *vcpu) /* Reset system registers */ kvm_reset_sys_regs(vcpu); + /* Reset PMU */ + kvm_pmu_vcpu_reset(vcpu); + /* Reset timer */ return kvm_timer_vcpu_reset(vcpu, cpu_vtimer_irq); } diff --git a/include/kvm/arm_pmu.h b/include/kvm/arm_pmu.h index 4cb0ade..fe8035a 100644 --- a/include/kvm/arm_pmu.h +++ b/include/kvm/arm_pmu.h @@ -39,6 +39,7 @@ struct kvm_pmu { }; #ifdef CONFIG_KVM_ARM_PMU +void kvm_pmu_vcpu_reset(struct kvm_vcpu *vcpu); void kvm_pmu_flush_hwstate(struct kvm_vcpu *vcpu); unsigned long kvm_pmu_get_counter_value(struct kvm_vcpu *vcpu, u32 select_idx); void kvm_pmu_disable_counter(struct kvm_vcpu *vcpu, u32 val); @@ -50,6 +51,7 @@ void kvm_pmu_set_counter_event_type(struct kvm_vcpu *vcpu, u32 data, u32 select_idx); void kvm_pmu_handle_pmcr(struct kvm_vcpu *vcpu, u32 val); #else +void kvm_pmu_vcpu_reset(struct kvm_vcpu *vcpu) {} void kvm_pmu_flush_hwstate(struct kvm_vcpu *vcpu) {} unsigned long kvm_pmu_get_counter_value(struct kvm_vcpu *vcpu, u32 select_idx) { diff --git a/virt/kvm/arm/pmu.c b/virt/kvm/arm/pmu.c index 34e7386..4014831 100644 --- a/virt/kvm/arm/pmu.c +++ b/virt/kvm/arm/pmu.c @@ -80,6 +80,24 @@ static void kvm_pmu_stop_counter(struct kvm_pmc *pmc) } /** + * kvm_pmu_vcpu_reset - reset pmu state for cpu + * @vcpu: The vcpu pointer + * + */ +void kvm_pmu_vcpu_reset(struct kvm_vcpu *vcpu) +{ + int i; + struct kvm_pmu *pmu = &vcpu->arch.pmu; + + for (i = 0; i < ARMV8_MAX_COUNTERS; i++) { + kvm_pmu_stop_counter(&pmu->pmc[i]); + pmu->pmc[i].idx = i; + pmu->pmc[i].vcpu = vcpu; + pmu->pmc[i].bitmask = 0xffffffffUL; + } +} + +/** * kvm_pmu_flush_hwstate - flush pmu state to cpu * @vcpu: The vcpu pointer *