From patchwork Thu Nov 19 14:53:59 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Auger Eric X-Patchwork-Id: 57009 Delivered-To: patches@linaro.org Received: by 10.112.155.196 with SMTP id vy4csp3227155lbb; Thu, 19 Nov 2015 06:54:33 -0800 (PST) X-Received: by 10.28.97.197 with SMTP id v188mr11669506wmb.63.1447944865857; Thu, 19 Nov 2015 06:54:25 -0800 (PST) Return-Path: Received: from mail-wm0-x232.google.com (mail-wm0-x232.google.com. [2a00:1450:400c:c09::232]) by mx.google.com with ESMTPS id ia5si11781703wjb.61.2015.11.19.06.54.25 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 19 Nov 2015 06:54:25 -0800 (PST) Received-SPF: pass (google.com: domain of eric.auger@linaro.org designates 2a00:1450:400c:c09::232 as permitted sender) client-ip=2a00:1450:400c:c09::232; Authentication-Results: mx.google.com; spf=pass (google.com: domain of eric.auger@linaro.org designates 2a00:1450:400c:c09::232 as permitted sender) smtp.mailfrom=eric.auger@linaro.org; dkim=pass header.i=@linaro-org.20150623.gappssmtp.com Received: by wmvv187 with SMTP id v187so29527034wmv.1 for ; Thu, 19 Nov 2015 06:54:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro-org.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=qpV5/oXDcyb9Xv9DQ64gDETz4JnZodG4Tk1ZXxOtFz8=; b=cFWz1LOmTscCoHYF41YHAFjaHjb5o+tagJ6QImHyXk8p1KmpJcd2rd5XqQqPocHUup PnzK/xbawpnPc48K/ZrYne2aiJbyQ18OPVIRfzyS6GzJdX5T3iMRJBx/f+tMumYSFvk6 d1sPR/LtF06ZsHtBetZr3L2dGk1S4scyDaOla/iek0OvUKlX3FS3NYDaBIibuU6Cnebn 7LcSYyP3kg5BabI+5RgWEF5N2A0jtJ/7qFaj0hUJkiaPdhinzmewBI6OPERlC01fVAGk Ag/4v1xJhSoQOmmY5UZQu/GBKzAQlsLp5J7voWvJbj/trqbWrohvHCd2x4WORxn1Cbot iTNQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=qpV5/oXDcyb9Xv9DQ64gDETz4JnZodG4Tk1ZXxOtFz8=; b=LxIqDp80FEvVRoSiDNk14Eq44tDSwxq6otyGrMCeB4oD6/v4XlI0PjVLKgHxf7xhfd f5EziDxlhP4SulRNnQ+D8cbZzKDo2yjgsnYjSvINAoGJ+3FcCTmlFhfMG8sl+Aynrh2z GORMkA5FF6YDShBmH2Tt4s/Mf0klN8kfu4EE0KZNZXp3CLDHBHvG3Xg5ea50uDSN3O3n XAKLq09vUEih4bzK7+pW8Wy7dnN1R2ti+5e5lz7W9l9abC0K9AntGTN5Q5ra9CcaV1ij FUwqTQoXIsAEbmpvw3wsKC9k097CxcyDjaEdWVPDysNdEsHo/3nayqmyH+L4A2liS0w9 FOkA== X-Gm-Message-State: ALoCoQkc/NUT3b4HIdIGodLU+TscPFX6ikxMs/8Zu9AShfOkE+LXgVsbcC0Qm+Ic3n9srIg0nBFd X-Received: by 10.28.6.142 with SMTP id 136mr17172027wmg.9.1447944865652; Thu, 19 Nov 2015 06:54:25 -0800 (PST) Return-Path: Received: from new-host-3.home (LMontsouris-657-1-37-90.w80-11.abo.wanadoo.fr. [80.11.198.90]) by smtp.gmail.com with ESMTPSA id h67sm34493865wmf.17.2015.11.19.06.54.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 19 Nov 2015 06:54:24 -0800 (PST) From: Eric Auger To: eric.auger@st.com, eric.auger@linaro.org, alex.williamson@redhat.com, b.reynal@virtualopensystems.com, christoffer.dall@linaro.org, marc.zyngier@arm.com, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org Cc: andre.przywara@arm.com, linux-kernel@vger.kernel.org, patches@linaro.org Subject: [PATCH v4 09/13] KVM: arm/arm64: vgic: support irqfd injection of a mapped IRQ Date: Thu, 19 Nov 2015 14:53:59 +0000 Message-Id: <1447944843-17731-10-git-send-email-eric.auger@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1447944843-17731-1-git-send-email-eric.auger@linaro.org> References: <1447944843-17731-1-git-send-email-eric.auger@linaro.org> Up to now irqfd injection was only possible for unmapped IRQ. This patch adds support for injecting mapped interrupts. Signed-off-by: Eric Auger --- virt/kvm/arm/vgic.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) -- 1.9.1 diff --git a/virt/kvm/arm/vgic.c b/virt/kvm/arm/vgic.c index dba8eb6..e96f79e 100644 --- a/virt/kvm/arm/vgic.c +++ b/virt/kvm/arm/vgic.c @@ -2476,13 +2476,21 @@ int kvm_irq_map_chip_pin(struct kvm *kvm, unsigned irqchip, unsigned pin) int kvm_set_irq(struct kvm *kvm, int irq_source_id, u32 irq, int level, bool line_status) { + struct vgic_dist *dist = &kvm->arch.vgic; unsigned int spi = irq + VGIC_NR_PRIVATE_IRQS; + struct irq_phys_map *map; + int vcpu_id; trace_kvm_set_irq(irq, level, irq_source_id); BUG_ON(!vgic_initialized(kvm)); - return kvm_vgic_inject_irq(kvm, 0, spi, level); + vcpu_id = dist->irq_spi_cpu[irq]; + map = vgic_irq_map_search(kvm_get_vcpu(kvm, vcpu_id), spi); + if (!map) + return kvm_vgic_inject_irq(kvm, vcpu_id, spi, level); + else + return kvm_vgic_inject_mapped_irq(kvm, vcpu_id, map, level); } /* MSI not implemented yet */