From patchwork Tue Oct 20 08:00:18 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AKASHI Takahiro X-Patchwork-Id: 55278 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-lf0-f71.google.com (mail-lf0-f71.google.com [209.85.215.71]) by patches.linaro.org (Postfix) with ESMTPS id 9DFE522EA2 for ; Tue, 20 Oct 2015 08:01:50 +0000 (UTC) Received: by lffz202 with SMTP id z202sf1415180lff.3 for ; Tue, 20 Oct 2015 01:01:49 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:sender:precedence:list-id :x-original-sender:x-original-authentication-results:mailing-list :list-post:list-help:list-archive:list-unsubscribe; bh=XZ7jlqFslh5vslRdZul3kh/IpRq3NfRnwWElZPQKiww=; b=HyUfSq6nyNbf7EC/HmjqrmcAAbmnxvq3hxZqQNTlkO0NAMUGsXW4aP5XTBzmJhxbSA /p9LnM7Q5n35vi0r957QV82t0fKrjOzrQy7scQElB0ddittUvkWXkTwwIGBReLs8j/Tl Z59vQs2carO2wjoBSouT4DPZYs5lBXWYkQtpVg9c6HMEL/HJylFgkk3yWeKfLhBpxk1w 6YUrt6KYVjXlZUikpaPpywJRy382NxFWgh7h8/Oh/nD5RMbU81qkih7okIj+YNdEAR5W O2dNvKi3WymM9yD8HORLQwUYrXZLPflfHo9MA2/3qap3tO1Ism4kr7rUGoCYpwcMqSgD NUww== X-Gm-Message-State: ALoCoQmW7K+o4NTDf7oJGfDmxxSML+oKZQqUCVwQ2l+HJc1PoLpDVMzO4lOgVm8Y3Olxox1Nkroz X-Received: by 10.194.109.233 with SMTP id hv9mr334811wjb.1.1445328109586; Tue, 20 Oct 2015 01:01:49 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.25.16.40 with SMTP id f40ls39639lfi.59.gmail; Tue, 20 Oct 2015 01:01:49 -0700 (PDT) X-Received: by 10.25.213.12 with SMTP id m12mr589418lfg.74.1445328109277; Tue, 20 Oct 2015 01:01:49 -0700 (PDT) Received: from mail-lf0-f44.google.com (mail-lf0-f44.google.com. [209.85.215.44]) by mx.google.com with ESMTPS id wt5si1331772lbb.57.2015.10.20.01.01.49 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Oct 2015 01:01:49 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.44 as permitted sender) client-ip=209.85.215.44; Received: by lffv3 with SMTP id v3so1515439lff.0 for ; Tue, 20 Oct 2015 01:01:49 -0700 (PDT) X-Received: by 10.25.205.198 with SMTP id d189mr605504lfg.72.1445328109156; Tue, 20 Oct 2015 01:01:49 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.59.35 with SMTP id w3csp1921652lbq; Tue, 20 Oct 2015 01:01:48 -0700 (PDT) X-Received: by 10.50.147.6 with SMTP id tg6mr2178565igb.68.1445328108117; Tue, 20 Oct 2015 01:01:48 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id j64si1768526ioi.211.2015.10.20.01.01.47; Tue, 20 Oct 2015 01:01:48 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932125AbbJTIBg (ORCPT + 28 others); Tue, 20 Oct 2015 04:01:36 -0400 Received: from mail-pa0-f48.google.com ([209.85.220.48]:34972 "EHLO mail-pa0-f48.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932105AbbJTIBd (ORCPT ); Tue, 20 Oct 2015 04:01:33 -0400 Received: by pasz6 with SMTP id z6so13975337pas.2 for ; Tue, 20 Oct 2015 01:01:33 -0700 (PDT) X-Received: by 10.66.101.9 with SMTP id fc9mr2432915pab.19.1445328093304; Tue, 20 Oct 2015 01:01:33 -0700 (PDT) Received: from localhost.localdomain (61-205-5-101m5.grp1.mineo.jp. [61.205.5.101]) by smtp.googlemail.com with ESMTPSA id zk3sm2135407pbb.41.2015.10.20.01.01.29 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 20 Oct 2015 01:01:32 -0700 (PDT) From: AKASHI Takahiro To: catalin.marinas@arm.com, will.deacon@arm.com Cc: jungseoklee85@gmail.com, james.morse@arm.com, mark.rutland@arm.com, broonie@kernel.org, david.griego@linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, AKASHI Takahiro Subject: [PATCH v2 1/2] arm64: revamp unwind_frame for interrupt stack Date: Tue, 20 Oct 2015 17:00:18 +0900 Message-Id: <1445328019-23330-2-git-send-email-takahiro.akashi@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1445328019-23330-1-git-send-email-takahiro.akashi@linaro.org> References: <1445328019-23330-1-git-send-email-takahiro.akashi@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: takahiro.akashi@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.44 as permitted sender) smtp.mailfrom=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , This patch allows unwind_frame() to traverse from interrupt stack to process stack correctly by having a dummy stack frame for irq exception entry created at its prologue. Signed-off-by: AKASHI Takahiro --- arch/arm64/kernel/entry.S | 22 ++++++++++++++++++++-- arch/arm64/kernel/stacktrace.c | 14 +++++++++++++- 2 files changed, 33 insertions(+), 3 deletions(-) diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S index c8e0bcf..779f807 100644 --- a/arch/arm64/kernel/entry.S +++ b/arch/arm64/kernel/entry.S @@ -186,8 +186,26 @@ alternative_endif and x23, x23, #~(IRQ_STACK_SIZE - 1) cmp x20, x23 // check irq re-enterance mov x19, sp - csel x23, x19, x24, eq // x24 = top of irq stack - mov sp, x23 + beq 1f + mov sp, x24 // x24 = top of irq stack + stp x29, x19, [sp, #-16]! // for sanity check + stp x29, x22, [sp, #-16]! // dummy stack frame + mov x29, sp +1: + /* + * Layout of interrupt stack after this macro is invoked: + * + * | | + *-0x20+----------------+ <= dummy stack frame + * | fp | : fp on process stack + *-0x18+----------------+ + * | lr | : return address + *-0x10+----------------+ + * | fp (copy) | : for sanity check + * -0x8+----------------+ + * | sp | : sp on process stack + * 0x0+----------------+ + */ .endm /* diff --git a/arch/arm64/kernel/stacktrace.c b/arch/arm64/kernel/stacktrace.c index 407991b..03611a1 100644 --- a/arch/arm64/kernel/stacktrace.c +++ b/arch/arm64/kernel/stacktrace.c @@ -43,12 +43,24 @@ int notrace unwind_frame(struct stackframe *frame) low = frame->sp; high = ALIGN(low, THREAD_SIZE); - if (fp < low || fp > high - 0x18 || fp & 0xf) + if (fp < low || fp > high - 0x20 || fp & 0xf) return -EINVAL; frame->sp = fp + 0x10; frame->fp = *(unsigned long *)(fp); /* + * check whether we are going to walk trough from interrupt stack + * to process stack + * If the previous frame is the initial (dummy) stack frame on + * interrupt stack, frame->sp now points to just below the frame + * (dummy frame + 0x10). + * See entry.S + */ +#define STACK_LOW(addr) round_down((addr), THREAD_SIZE) + if ((STACK_LOW(frame->sp) != STACK_LOW(frame->fp)) && + (frame->fp == *(unsigned long *)frame->sp)) + frame->sp = *((unsigned long *)(frame->sp + 8)); + /* * -4 here because we care about the PC at time of bl, * not where the return will go. */