From patchwork Fri Oct 16 10:23:37 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhou Wang X-Patchwork-Id: 55088 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-wi0-f200.google.com (mail-wi0-f200.google.com [209.85.212.200]) by patches.linaro.org (Postfix) with ESMTPS id 5F02C22FFA for ; Fri, 16 Oct 2015 10:09:12 +0000 (UTC) Received: by wibzt1 with SMTP id zt1sf736396wib.0 for ; Fri, 16 Oct 2015 03:09:11 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-type:sender:precedence :list-id:x-original-sender:x-original-authentication-results :mailing-list:list-post:list-help:list-archive:list-unsubscribe; bh=ZK1M3qip/Jfou5ripjr+5IVZ0qgkVTtphGgXpj/H9jc=; b=kOJCtX1Tw8Lh509KYJFyxNCw5RFZxcWaxAoDKNXBz3N5DfdOHE9PL/rEvA4RBYYbnD AiNVhaVfEtwQuNv/6uCF8GVJWWk9/8iEfFcO7nwG01sXPxa4gmXRbU+Shky2mVZKOWSU WWn6BrjIq+ApBZheVI92uD+aIsDbLhKW8AxPuZIR7MSRqOFD/Tj9nHeSHjI1HkpSgbBM bPdLaeOiQdpM7djMDemosXvD1jxRN5yJTDIZ4qmiF9oliZjPTfqq4T5PtypfLDDTpXHM mskYpXpf8H+u4fLzaXC+Q69viInf5D6jy6YmuaxpIp+aqnKbwjEucLOtSSOeEAhE2+4+ k+yg== X-Gm-Message-State: ALoCoQnrVT2mOIpCAbEK82drvSTtrQKKjXVEpCQZWDupQ2N/O7fWhoweQ5AVWzFjfwBcNngxlive X-Received: by 10.112.173.170 with SMTP id bl10mr372352lbc.7.1444990151314; Fri, 16 Oct 2015 03:09:11 -0700 (PDT) X-BeenThere: patchwork-forward@linaro.org Received: by 10.25.87.8 with SMTP id l8ls310030lfb.92.gmail; Fri, 16 Oct 2015 03:09:11 -0700 (PDT) X-Received: by 10.112.151.106 with SMTP id up10mr7946613lbb.106.1444990151175; Fri, 16 Oct 2015 03:09:11 -0700 (PDT) Received: from mail-lb0-f178.google.com (mail-lb0-f178.google.com. [209.85.217.178]) by mx.google.com with ESMTPS id s71si12379153lfs.95.2015.10.16.03.09.11 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 16 Oct 2015 03:09:11 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.178 as permitted sender) client-ip=209.85.217.178; Received: by lbcao8 with SMTP id ao8so96540420lbc.3 for ; Fri, 16 Oct 2015 03:09:11 -0700 (PDT) X-Received: by 10.112.151.106 with SMTP id up10mr7946605lbb.106.1444990150984; Fri, 16 Oct 2015 03:09:10 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.59.35 with SMTP id w3csp1166407lbq; Fri, 16 Oct 2015 03:09:10 -0700 (PDT) X-Received: by 10.107.128.27 with SMTP id b27mr5905301iod.64.1444990149907; Fri, 16 Oct 2015 03:09:09 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e193si15616722ioe.131.2015.10.16.03.09.09; Fri, 16 Oct 2015 03:09:09 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754066AbbJPKIu (ORCPT + 30 others); Fri, 16 Oct 2015 06:08:50 -0400 Received: from szxga01-in.huawei.com ([58.251.152.64]:4482 "EHLO szxga01-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753809AbbJPKIr (ORCPT ); Fri, 16 Oct 2015 06:08:47 -0400 Received: from 172.24.1.51 (EHLO SZXEML429-HUB.china.huawei.com) ([172.24.1.51]) by szxrg01-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id CWW75862; Fri, 16 Oct 2015 18:08:36 +0800 (CST) Received: from localhost.localdomain (10.67.212.75) by SZXEML429-HUB.china.huawei.com (10.82.67.184) with Microsoft SMTP Server id 14.3.235.1; Fri, 16 Oct 2015 18:08:23 +0800 From: Zhou Wang To: Bjorn Helgaas , , , Arnd Bergmann , , , , , , , , , , CC: , , , , , , , , , , Zhou Wang Subject: [PATCH v11 2/6] ARM/PCI: remove align_resource in pci_sys_data Date: Fri, 16 Oct 2015 18:23:37 +0800 Message-ID: <1444991021-109306-3-git-send-email-wangzhou1@hisilicon.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1444991021-109306-1-git-send-email-wangzhou1@hisilicon.com> References: <1444991021-109306-1-git-send-email-wangzhou1@hisilicon.com> MIME-Version: 1.0 X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: linux-kernel-owner@vger.kernel.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.178 as permitted sender) smtp.mailfrom=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: gabriele paoloni This patch is needed in order to unify the PCIe designware framework for ARM and ARM64 architectures. In the PCIe designware unification process we are calling pci_create_root_bus() passing a "sysdata" parameter that is the same for both ARM and ARM64 and is of type "struct pcie_port*". In the ARM case this will cause a problem with the function pcibios_align_resource(); in fact this will cast "dev->sysdata" to "struct pci_sys_data*", whereas designware had passed a "struct pcie_port*" pointer. This patch solves the issue by removing "align_resource" from "pci_sys_data" struct and defining a static global function pointer in "bios32.c" Signed-off-by: Gabriele Paoloni Signed-off-by: Zhou Wang Acked-by: Pratyush Anand --- arch/arm/include/asm/mach/pci.h | 6 ------ arch/arm/kernel/bios32.c | 12 ++++++++---- 2 files changed, 8 insertions(+), 10 deletions(-) diff --git a/arch/arm/include/asm/mach/pci.h b/arch/arm/include/asm/mach/pci.h index 8857d28..0070e85 100644 --- a/arch/arm/include/asm/mach/pci.h +++ b/arch/arm/include/asm/mach/pci.h @@ -52,12 +52,6 @@ struct pci_sys_data { u8 (*swizzle)(struct pci_dev *, u8 *); /* IRQ mapping */ int (*map_irq)(const struct pci_dev *, u8, u8); - /* Resource alignement requirements */ - resource_size_t (*align_resource)(struct pci_dev *dev, - const struct resource *res, - resource_size_t start, - resource_size_t size, - resource_size_t align); void *private_data; /* platform controller private data */ }; diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c index 874e182..6551d28 100644 --- a/arch/arm/kernel/bios32.c +++ b/arch/arm/kernel/bios32.c @@ -17,6 +17,11 @@ #include static int debug_pci; +static resource_size_t (*align_resource)(struct pci_dev *dev, + const struct resource *res, + resource_size_t start, + resource_size_t size, + resource_size_t align) = NULL; /* * We can't use pci_get_device() here since we are @@ -456,7 +461,7 @@ static void pcibios_init_hw(struct device *parent, struct hw_pci *hw, sys->busnr = busnr; sys->swizzle = hw->swizzle; sys->map_irq = hw->map_irq; - sys->align_resource = hw->align_resource; + align_resource = hw->align_resource; INIT_LIST_HEAD(&sys->resources); if (hw->private_data) @@ -572,7 +577,6 @@ resource_size_t pcibios_align_resource(void *data, const struct resource *res, resource_size_t size, resource_size_t align) { struct pci_dev *dev = data; - struct pci_sys_data *sys = dev->sysdata; resource_size_t start = res->start; if (res->flags & IORESOURCE_IO && start & 0x300) @@ -580,8 +584,8 @@ resource_size_t pcibios_align_resource(void *data, const struct resource *res, start = (start + align - 1) & ~(align - 1); - if (sys->align_resource) - return sys->align_resource(dev, res, start, size, align); + if (align_resource) + return align_resource(dev, res, start, size, align); return start; }