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[209.132.180.67]) by mx.google.com with ESMTP id qc6si10663314igb.23.2015.10.15.01.41.45; Thu, 15 Oct 2015 01:41:46 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752174AbbJOIll (ORCPT + 30 others); Thu, 15 Oct 2015 04:41:41 -0400 Received: from szxga02-in.huawei.com ([119.145.14.65]:36446 "EHLO szxga02-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751302AbbJOIlj (ORCPT ); Thu, 15 Oct 2015 04:41:39 -0400 Received: from 172.24.1.50 (EHLO szxeml434-hub.china.huawei.com) ([172.24.1.50]) by szxrg02-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id CUG14544; Thu, 15 Oct 2015 16:36:26 +0800 (CST) Received: from localhost (10.177.23.164) by szxeml434-hub.china.huawei.com (10.82.67.225) with Microsoft SMTP Server id 14.3.235.1; Thu, 15 Oct 2015 16:36:16 +0800 From: Zhen Lei To: Catalin Marinas , Will Deacon , Joerg Roedel , linux-arm-kernel , iommu , Robin Murphy , Laurent Pinchart , linux-kernel CC: Zefan Li , Xinwei Hu , "Tianhong Ding" , Hanjun Guo , Zhen Lei Subject: [PATCH v4 3/5] iommu/arm-smmu: add support for non-pci devices Date: Thu, 15 Oct 2015 16:30:45 +0800 Message-ID: <1444897847-18040-4-git-send-email-thunder.leizhen@huawei.com> X-Mailer: git-send-email 1.9.5.msysgit.1 In-Reply-To: <1444897847-18040-1-git-send-email-thunder.leizhen@huawei.com> References: <1444897847-18040-1-git-send-email-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.23.164] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: thunder.leizhen@huawei.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.45 as permitted sender) smtp.mailfrom=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , This patch support a master with multiple stream IDs, but doesn't support a master behinds more than one SMMUs. Signed-off-by: Zhen Lei --- drivers/iommu/arm-smmu-v3.c | 40 ++++++++++++++++++++++++++++++++++++++-- 1 file changed, 38 insertions(+), 2 deletions(-) -- 2.5.0 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/ diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c index b577d61..021a846 100644 --- a/drivers/iommu/arm-smmu-v3.c +++ b/drivers/iommu/arm-smmu-v3.c @@ -31,6 +31,7 @@ #include #include #include +#include #include #include @@ -1938,9 +1939,36 @@ static int arm_smmu_of_xlate(struct device *dev, struct of_phandle_args *args) return -EINVAL; } - /* We only support PCI, for now */ if (!dev_is_pci(dev)) { - return -ENODEV; + struct iommu_group *group; + + if (args->args_count != 1) { + dev_err(dev, + "only support #iommu-cells = <1>, please check node: %s\n", + dev_name(smmu->dev)); + return -ENODEV; + } + + group = iommu_group_get(dev); + if (!group) { + group = iommu_group_alloc(); + if (IS_ERR(group)) { + dev_err(dev, "failed to allocate IOMMU group\n"); + return PTR_ERR(group); + } + + ret = iommu_group_add_device(group, dev); + if (ret) { + iommu_group_put(group); + dev_err(dev, "failed to add device into IOMMU group\n"); + return ret; + } + } + iommu_group_put(group); + + ret = __arm_smmu_add_device(dev, args->args[0]); + if (ret) + return ret; } else { struct device *root; struct pci_dev *pdev = NULL; @@ -2793,6 +2821,14 @@ static int __init arm_smmu_init(void) if (ret) return ret; + if (!iommu_present(&platform_bus_type)) + bus_set_iommu(&platform_bus_type, &arm_smmu_ops); + +#ifdef CONFIG_ARM_AMBA + if (!iommu_present(&amba_bustype)) + bus_set_iommu(&amba_bustype, &arm_smmu_ops); +#endif + return bus_set_iommu(&pci_bus_type, &arm_smmu_ops); }