From patchwork Tue Oct 6 17:46:30 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Will Deacon X-Patchwork-Id: 54555 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-la0-f72.google.com (mail-la0-f72.google.com [209.85.215.72]) by patches.linaro.org (Postfix) with ESMTPS id 8F77822F05 for ; Tue, 6 Oct 2015 17:49:09 +0000 (UTC) Received: by laff3 with SMTP id f3sf30962716laf.0 for ; Tue, 06 Oct 2015 10:49:08 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:from:to:subject:date:message-id :in-reply-to:references:precedence:list-id:list-unsubscribe :list-archive:list-post:list-help:list-subscribe:cc:mime-version :content-type:content-transfer-encoding:sender:errors-to :x-original-sender:x-original-authentication-results:mailing-list; bh=id0vmLBEqoSjnyvA+9jRMORE6DEGrBMSbry8KmpNeSU=; b=MqiuRCFYoXAU2V9laCjNkJUs60BeaoqBDjOZm2DRbQgNAvo+uqo1bfkmJq9TWNx5Qh wP4JIpOT0p8gW1QcpAo3whuUm7eiAeAFb7D5vHxsMDzZRIc+TN/8VX1qN/nGxRmJYC4P nBb8GClKwt0aZgKq9029R3umqXw3MGKnApaUc2tPTeHMU9h9MNb4L74YX4uOD6vg3ohY OGFVS9bjIMG2CK10zyL2Pv9LL+Qakbz15CGCiuElRB5GwxJ9shcibCH4N+PauyRYFrmH FThw/3bvjwia11TYfz4nJFblEn3a5KsHL17LzCDAmyQbT9dtoJaa9rhdQCK12rPNfROp sssQ== X-Gm-Message-State: ALoCoQksA+dkBR8xTLsBolFHdcwB00xPgHUi6sTOyBWQQ1mlap8+GW4afgAr093UcnEop8BRyHFx X-Received: by 10.112.40.17 with SMTP id t17mr6615848lbk.10.1444153748260; Tue, 06 Oct 2015 10:49:08 -0700 (PDT) X-BeenThere: patchwork-forward@linaro.org Received: by 10.25.30.18 with SMTP id e18ls580177lfe.35.gmail; Tue, 06 Oct 2015 10:49:08 -0700 (PDT) X-Received: by 10.25.154.5 with SMTP id c5mr10244905lfe.103.1444153748051; Tue, 06 Oct 2015 10:49:08 -0700 (PDT) Received: from mail-la0-f47.google.com (mail-la0-f47.google.com. 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[2001:1868:205::9]) by mx.google.com with ESMTPS id u9si39617699wjx.196.2015.10.06.10.49.06 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 06 Oct 2015 10:49:07 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:1868:205::9 as permitted sender) client-ip=2001:1868:205::9; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZjWKo-0008N1-8I; Tue, 06 Oct 2015 17:47:30 +0000 Received: from cam-admin0.cambridge.arm.com ([217.140.96.50]) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZjWKF-0007pO-Af for linux-arm-kernel@lists.infradead.org; Tue, 06 Oct 2015 17:46:57 +0000 Received: from edgewater-inn.cambridge.arm.com (edgewater-inn.cambridge.arm.com [10.1.203.122]) by cam-admin0.cambridge.arm.com (8.12.6/8.12.6) with ESMTP id t96HkVWx001365; Tue, 6 Oct 2015 18:46:32 +0100 (BST) Received: by edgewater-inn.cambridge.arm.com (Postfix, from userid 1000) id BDD711AE0E5B; Tue, 6 Oct 2015 18:46:32 +0100 (BST) From: Will Deacon To: catalin.marinas@arm.com Subject: [PATCH v2 10/10] arm64: mm: remove dsb from update_mmu_cache Date: Tue, 6 Oct 2015 18:46:30 +0100 Message-Id: <1444153590-24173-11-git-send-email-will.deacon@arm.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1444153590-24173-1-git-send-email-will.deacon@arm.com> References: <1444153590-24173-1-git-send-email-will.deacon@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151006_104655_863204_C62F27D8 X-CRM114-Status: GOOD ( 10.54 ) X-Spam-Score: -6.9 (------) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-6.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [217.140.96.50 listed in list.dnswl.org] -0.0 T_RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Cc: Will Deacon , linux-arm-kernel@lists.infradead.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: will.deacon@arm.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.47 as permitted sender) smtp.mailfrom=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 update_mmu_cache() consists of a dsb(ishst) instruction so that new user mappings are guaranteed to be visible to the page table walker on exception return. In reality this can be a very expensive operation which is rarely needed. Removing this barrier shows a modest improvement in hackbench scores and , in the worst case, we re-take the user fault and establish that there was nothing to do. Reviewed-by: Catalin Marinas Signed-off-by: Will Deacon --- arch/arm64/include/asm/pgtable.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h index 26b066690593..0d18e88e1cfa 100644 --- a/arch/arm64/include/asm/pgtable.h +++ b/arch/arm64/include/asm/pgtable.h @@ -646,10 +646,10 @@ static inline void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep) { /* - * set_pte() does not have a DSB for user mappings, so make sure that - * the page table write is visible. + * We don't do anything here, so there's a very small chance of + * us retaking a user fault which we just fixed up. The alternative + * is doing a dsb(ishst), but that penalises the fastpath. */ - dsb(ishst); } #define update_mmu_cache_pmd(vma, address, pmd) do { } while (0)