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[209.132.180.67]) by mx.google.com with ESMTP id z5si20271135igl.39.2015.09.30.04.09.55; Wed, 30 Sep 2015 04:09:55 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933140AbbI3LJo (ORCPT + 30 others); Wed, 30 Sep 2015 07:09:44 -0400 Received: from szxga03-in.huawei.com ([119.145.14.66]:7350 "EHLO szxga03-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756252AbbI3LJQ (ORCPT ); Wed, 30 Sep 2015 07:09:16 -0400 Received: from 172.24.1.48 (EHLO SZXEML424-HUB.china.huawei.com) ([172.24.1.48]) by szxrg03-dlp.huawei.com (MOS 4.4.3-GA FastPath queued) with ESMTP id BOE86772; Wed, 30 Sep 2015 19:05:24 +0800 (CST) Received: from localhost (10.67.54.136) by SZXEML424-HUB.china.huawei.com (10.82.67.153) with Microsoft SMTP Server id 14.3.235.1; Wed, 30 Sep 2015 19:05:13 +0800 From: Fei Wang To: , , , , , , , , , , , , , , CC: , , , , , , , , , , , , Subject: [PATCH 6/8] dt-bindings: mtcmos: Document Hi6220 mtcmos driver Date: Wed, 30 Sep 2015 19:05:09 +0800 Message-ID: <1443611111-3196-7-git-send-email-w.f@huawei.com> X-Mailer: git-send-email 2.6.0.windows.1 In-Reply-To: <1443611111-3196-1-git-send-email-w.f@huawei.com> References: <1443611111-3196-1-git-send-email-w.f@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.67.54.136] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A090203.560BC1F5.010B, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2013-05-26 15:14:31, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 7a0f8a38c2b7bfb836daf84058ec35a4 Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: w.f@huawei.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.50 as permitted sender) smtp.mailfrom=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Document the new compatible for Hisilicon Hi6220 mtcmos driver. Signed-off-by: Fei Wang --- .../bindings/regulator/hisilicon,hi6220-mtcmos.txt | 32 ++++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 Documentation/devicetree/bindings/regulator/hisilicon,hi6220-mtcmos.txt diff --git a/Documentation/devicetree/bindings/regulator/hisilicon,hi6220-mtcmos.txt b/Documentation/devicetree/bindings/regulator/hisilicon,hi6220-mtcmos.txt new file mode 100644 index 0000000..748ac62 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/hisilicon,hi6220-mtcmos.txt @@ -0,0 +1,32 @@ +Hi6220 mtcmos Voltage regulators + +Required parent device properties: +- compatible: Must be "hisilicon,hi6220-mtcmos-driver" +- hisilicon,mtcmos-steady-us: The time to wait for power steady +- hisilicon,mtcmos-sc-on-base: address of hi6220 soc control register + +Required child device properties: +- regulator-name: The name of mtcmos +- hisilicon,ctrl-regs: offset of ctrl-regs +- hisilicon,ctrl-data: the bit to ctrl the regulator + +Example: + mtcmos { + compatible = "hisilicon,hi6220-mtcmos-driver"; + hisilicon,mtcmos-steady-us = <10>; + hisilicon,mtcmos-sc-on-base = <0xf7800000>; + hisilicon,mtcmos-acpu-on-base = <0xf65a0000>; + + mtcmos1: regulator@a1{ + regulator-name = "G3D_PD_VDD"; + regulator-compatible = "mtcmos1"; + hisilicon,ctrl-regs = <0x830 0x834 0x83c>; + hisilicon,ctrl-data = <1 0x1>; + }; + mtcmos2: regulator@a2{ + regulator-name = "SOC_MED"; + regulator-compatible = "mtcmos2"; + hisilicon,ctrl-regs = <0x830 0x834 0x83c>; + hisilicon,ctrl-data = <2 0x1>; + }; + };