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[209.132.180.67]) by mx.google.com with ESMTP id f11si7519091iod.99.2015.09.18.09.28.00; Fri, 18 Sep 2015 09:28:01 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754832AbbIRQ13 (ORCPT + 30 others); Fri, 18 Sep 2015 12:27:29 -0400 Received: from mail-pa0-f50.google.com ([209.85.220.50]:36203 "EHLO mail-pa0-f50.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754732AbbIRQ10 (ORCPT ); Fri, 18 Sep 2015 12:27:26 -0400 Received: by padhk3 with SMTP id hk3so55054199pad.3 for ; Fri, 18 Sep 2015 09:27:25 -0700 (PDT) X-Received: by 10.68.125.197 with SMTP id ms5mr8338149pbb.38.1442593645682; Fri, 18 Sep 2015 09:27:25 -0700 (PDT) Received: from t430.cg.shawcable.net ([184.64.168.246]) by smtp.gmail.com with ESMTPSA id la4sm9847027pbc.76.2015.09.18.09.27.24 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 18 Sep 2015 09:27:25 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org, a.p.zijlstra@chello.nl, alexander.shishkin@linux.intel.com, acme@kernel.org, mingo@redhat.com, corbet@lwn.net Cc: adrian.hunter@intel.com, zhang.chunyan@linaro.org, mike.leach@arm.com, tor@ti.com, al.grant@arm.com, pawel.moll@arm.com, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH 17/20] coresight: etm-perf: adding symbolic link for CPUs Date: Fri, 18 Sep 2015 10:26:31 -0600 Message-Id: <1442593594-10665-18-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1442593594-10665-1-git-send-email-mathieu.poirier@linaro.org> References: <1442593594-10665-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: mathieu.poirier@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.174 as permitted sender) smtp.mailfrom=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Other than probing each device entry under /sys/bus/coresight/devices/, there is no way for user space to know which CPU is associated to which tracer. But knowing those association is important to discover tracer specifics and configuration options. As such introducing a symbolic link under /sys/bus/event_source/devices/cs_etm/cpuX that reference the coresight device a CPU is associated with. Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-etm-perf.c | 22 +++++++++++++++++++ drivers/hwtracing/coresight/coresight-etm-perf.h | 27 ++++++++++++++++++++++++ drivers/hwtracing/coresight/coresight-etm3x.c | 6 ++++++ 3 files changed, 55 insertions(+) create mode 100644 drivers/hwtracing/coresight/coresight-etm-perf.h diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c index edacf4b1d0bc..de0198e72603 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.c +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c @@ -341,6 +341,28 @@ static int etm_event_add(struct perf_event *event, int mode) return 0; } +int etm_perf_symlink(struct coresight_device *csdev, bool link) +{ + char entry[sizeof("cpu9999999")]; + int ret = 0, cpu = source_ops(csdev)->cpu_id(csdev); + struct device *pmu_dev = etm_pmu.dev; + struct device *cs_dev = &csdev->dev; + + sprintf(entry, "cpu%d", cpu); + + if (link) { + ret = sysfs_create_link(&pmu_dev->kobj, &cs_dev->kobj, entry); + if (ret) + return ret; + per_cpu(csdev_src, cpu) = csdev; + } else { + sysfs_remove_link(&pmu_dev->kobj, entry); + per_cpu(csdev_src, cpu) = NULL; + } + + return 0; +} + static int __init etm_perf_init(void) { etm_pmu.capabilities = PERF_PMU_CAP_EXCLUSIVE; diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.h b/drivers/hwtracing/coresight/coresight-etm-perf.h new file mode 100644 index 000000000000..4dd900f2362a --- /dev/null +++ b/drivers/hwtracing/coresight/coresight-etm-perf.h @@ -0,0 +1,27 @@ +/* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _CORESIGHT_ETM_PERF_H +#define _CORESIGHT_ETM_PERF_H + +struct coresight_device; + +#ifdef CONFIG_CORESIGHT +int etm_perf_symlink(struct coresight_device *csdev, bool link); + +#else +static inline int etm_perf_symlink(struct coresight_device *csdev, bool link) +{ return -EINVAL; } + +#endif /* CONFIG_CORESIGHT */ + +#endif diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c index a4c158df0fef..6a44ea330a4a 100644 --- a/drivers/hwtracing/coresight/coresight-etm3x.c +++ b/drivers/hwtracing/coresight/coresight-etm3x.c @@ -34,6 +34,7 @@ #include #include "coresight-etm.h" +#include "coresight-etm-perf.h" static int boot_enable; module_param_named(boot_enable, boot_enable, int, S_IRUGO); @@ -1995,6 +1996,11 @@ static int etm_probe(struct amba_device *adev, const struct amba_id *id) goto err_arch_supported; } + if (etm_perf_symlink(drvdata->csdev, true)) { + ret = -EPROBE_DEFER; + goto err_arch_supported; + } + pm_runtime_put(&adev->dev); dev_info(dev, "%s initialized\n", (char *)id->data);