From patchwork Fri Sep 11 17:22:02 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Catalin Marinas X-Patchwork-Id: 53493 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-wi0-f197.google.com (mail-wi0-f197.google.com [209.85.212.197]) by patches.linaro.org (Postfix) with ESMTPS id 11B52215BF for ; Fri, 11 Sep 2015 17:23:50 +0000 (UTC) Received: by wicuu12 with SMTP id uu12sf21110870wic.2 for ; Fri, 11 Sep 2015 10:23:49 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:from:to:subject:date:message-id :in-reply-to:references:precedence:list-id:list-unsubscribe :list-archive:list-post:list-help:list-subscribe:cc:mime-version :content-type:content-transfer-encoding:sender:errors-to :x-original-sender:x-original-authentication-results:mailing-list; bh=J0ny9jGn/IDVxmu06O0rAA8a65T50D10sfOOLwPJX84=; b=UmNzOHzMxGGdClTO8+YtapMLnAd6anu8ACSC9R11vEPk2LTqdp/t9yI8dqH3+mIlLQ egXNO3+Rf42Xu+VyvP6xNdKyGE999knLXsoFHByAYSgoxOMXkDjyB3Z4PbCAowQinp+b qp/OdK5mVbBFOwKbFU1d/bjoeGD0EQ5je4Ihcxmmue1p1OeYEc91nAMOOVyny9/hScEw Z/HKmhG58Ap4l7SuC47BcGy4gpHCjuWkeuWsbCivJkrxuZcCKJDrqAV6r+DEeso30G4k tGiGP6TVxfQtlAKCz2UWiho7bjzQSnqq6PROBY7Kmh/irL5t+PtZslbDa5gGNo9DIZx9 8tIA== X-Gm-Message-State: ALoCoQmeSdfV2WBb4+6FxhIUpzsjTWgH/RzYuaZqbBBturVUhJMpwoK05CYtdS9/xh3ULARfMTIC X-Received: by 10.112.158.202 with SMTP id ww10mr9116149lbb.13.1441992229320; Fri, 11 Sep 2015 10:23:49 -0700 (PDT) X-BeenThere: patchwork-forward@linaro.org Received: by 10.152.30.10 with SMTP id o10ls355338lah.22.gmail; Fri, 11 Sep 2015 10:23:49 -0700 (PDT) X-Received: by 10.152.23.167 with SMTP id n7mr19901965laf.18.1441992229159; Fri, 11 Sep 2015 10:23:49 -0700 (PDT) Received: from mail-lb0-f170.google.com (mail-lb0-f170.google.com. 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[2001:1868:205::9]) by mx.google.com with ESMTPS id b7si111013igf.27.2015.09.11.10.23.47 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 11 Sep 2015 10:23:48 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:1868:205::9 as permitted sender) client-ip=2001:1868:205::9; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZaS2C-0004k0-5N; Fri, 11 Sep 2015 17:22:48 +0000 Received: from foss.arm.com ([217.140.101.70]) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZaS1v-0004I4-7c for linux-arm-kernel@lists.infradead.org; Fri, 11 Sep 2015 17:22:31 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4CB2B55D; Fri, 11 Sep 2015 10:22:24 -0700 (PDT) Received: from e104818-lin.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id AF72E3F21A; Fri, 11 Sep 2015 10:22:11 -0700 (PDT) From: Catalin Marinas To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 3/3] arm64: pgtable: use a single bit for PTE_WRITE regardless of DBM Date: Fri, 11 Sep 2015 18:22:02 +0100 Message-Id: <1441992122-19888-4-git-send-email-catalin.marinas@arm.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1441992122-19888-1-git-send-email-catalin.marinas@arm.com> References: <1441992122-19888-1-git-send-email-catalin.marinas@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150911_102231_303046_2823C043 X-CRM114-Status: UNSURE ( 8.70 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -6.9 (------) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-6.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [217.140.101.70 listed in list.dnswl.org] -0.0 T_RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Cc: Julien Grall , Will Deacon MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: catalin.marinas@arm.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.170 as permitted sender) smtp.mailfrom=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 From: Will Deacon Depending on CONFIG_ARM64_HW_AFDBM, we use either bit 57 or 51 of the pte to represent PTE_WRITE. Given that bit 51 is reserved prior to ARMv8.1, we can just use that bit regardless of the config option. That also matches what happens if a kernel configured with ARM64_HW_AFDBM=y is run on a CPU without the DBM functionality. Signed-off-by: Will Deacon Signed-off-by: Catalin Marinas Cc: Julien Grall --- arch/arm64/include/asm/pgtable.h | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h index 31df98adf005..b0329be95cb1 100644 --- a/arch/arm64/include/asm/pgtable.h +++ b/arch/arm64/include/asm/pgtable.h @@ -26,13 +26,9 @@ * Software defined PTE bits definition. */ #define PTE_VALID (_AT(pteval_t, 1) << 0) +#define PTE_WRITE (PTE_DBM) /* same as DBM (51) */ #define PTE_DIRTY (_AT(pteval_t, 1) << 55) #define PTE_SPECIAL (_AT(pteval_t, 1) << 56) -#ifdef CONFIG_ARM64_HW_AFDBM -#define PTE_WRITE (PTE_DBM) /* same as DBM */ -#else -#define PTE_WRITE (_AT(pteval_t, 1) << 57) -#endif #define PTE_PROT_NONE (_AT(pteval_t, 1) << 58) /* only when !PTE_VALID */ /*