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[209.132.180.67]) by mx.google.com with ESMTP id zp6si1400870pac.43.2015.08.26.21.09.09; Wed, 26 Aug 2015 21:09:10 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752670AbbH0EJG (ORCPT + 28 others); Thu, 27 Aug 2015 00:09:06 -0400 Received: from mail-pa0-f42.google.com ([209.85.220.42]:33169 "EHLO mail-pa0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751530AbbH0EJE (ORCPT ); Thu, 27 Aug 2015 00:09:04 -0400 Received: by pacti10 with SMTP id ti10so10720355pac.0 for ; Wed, 26 Aug 2015 21:09:03 -0700 (PDT) X-Received: by 10.69.11.196 with SMTP id ek4mr3357070pbd.148.1440648543596; Wed, 26 Aug 2015 21:09:03 -0700 (PDT) Received: from zcy-ubuntu.spreadtrum.com ([175.111.195.49]) by smtp.gmail.com with ESMTPSA id kw3sm649498pbc.30.2015.08.26.21.08.59 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 26 Aug 2015 21:09:02 -0700 (PDT) From: Chunyan Zhang To: gregkh@linuxfoundation.org, mathieu.poirier@linaro.org Cc: broonie@kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH] Coresight: ETMv4: Prevent TRCRSCTLR0&1 from being accessed Date: Thu, 27 Aug 2015 12:06:09 +0800 Message-Id: <1440648369-4614-1-git-send-email-zhang.chunyan@linaro.org> X-Mailer: git-send-email 1.9.1 Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: zhang.chunyan@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.43 as permitted sender) smtp.mailfrom=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , 1. TRCRSCTLRn - Resource Selection Control Registers n=0~1 are reserved, we shouldn't access them. 2. The max number of 'n' here is defined in TRCIDR4.NUMRSPAIR whoes value indicates the number of resource selection *pairs*, and 0 indicates one resource selection pair, 1 indicates two pairs, and so on ... So, the total number of resource selection control registers which we can access is (TRCIDR4.NUMRSPAIR * 2) Signed-off-by: Chunyan Zhang --- drivers/hwtracing/coresight/coresight-etm4x.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c index 1312e99..9425249 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x.c +++ b/drivers/hwtracing/coresight/coresight-etm4x.c @@ -136,7 +136,9 @@ static void etm4_enable_hw(void *info) writel_relaxed(drvdata->cntr_val[i], drvdata->base + TRCCNTVRn(i)); } - for (i = 0; i < drvdata->nr_resource; i++) + + /* Resource selector pair 0 is always implemented and reserved */ + for (i = 2; i < (drvdata->nr_resource + 1) * 2; i++) writel_relaxed(drvdata->res_ctrl[i], drvdata->base + TRCRSCTLRn(i)); @@ -489,8 +491,9 @@ static ssize_t reset_store(struct device *dev, drvdata->cntr_val[i] = 0x0; } - drvdata->res_idx = 0x0; - for (i = 0; i < drvdata->nr_resource; i++) + /* Resource selector pair 0 is always implemented and reserved */ + drvdata->res_idx = 0x2; + for (i = 2; i < (drvdata->nr_resource + 1) * 2; i++) drvdata->res_ctrl[i] = 0x0; for (i = 0; i < drvdata->nr_ss_cmp; i++) { @@ -1729,7 +1732,7 @@ static ssize_t res_idx_store(struct device *dev, if (kstrtoul(buf, 16, &val)) return -EINVAL; /* Resource selector pair 0 is always implemented and reserved */ - if ((val == 0) || (val >= drvdata->nr_resource)) + if (val < 2 || val > (drvdata->nr_resource + 1) * 2) return -EINVAL; /* @@ -2498,7 +2501,9 @@ static void etm4_init_default_data(struct etmv4_drvdata *drvdata) drvdata->cntr_val[i] = 0x0; } - for (i = 2; i < drvdata->nr_resource * 2; i++) + /* Resource selector pair 0 is always implemented and reserved */ + drvdata->res_idx = 0x2; + for (i = 2; i < (drvdata->nr_resource + 1) * 2; i++) drvdata->res_ctrl[i] = 0x0; for (i = 0; i < drvdata->nr_ss_cmp; i++) {