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[72.71.243.249]) by smtp.googlemail.com with ESMTPSA id m62sm167234qhb.45.2015.08.10.17.52.46 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 10 Aug 2015 17:52:47 -0700 (PDT) From: David Long To: Catalin Marinas , Will Deacon , linux-arm-kernel@lists.infradead.org, Russell King Cc: sandeepa.s.prabhu@gmail.com, William Cohen , Steve Capper , "Jon Medhurst (Tixy)" , Masami Hiramatsu , Ananth N Mavinakayanahalli , Anil S Keshavamurthy , , Mark Brown , linux-kernel@vger.kernel.org Subject: [PATCH v8 1/7] arm64: Add HAVE_REGS_AND_STACK_ACCESS_API feature Date: Mon, 10 Aug 2015 20:52:38 -0400 Message-Id: <1439254364-15362-2-git-send-email-dave.long@linaro.org> X-Mailer: git-send-email 1.8.1.2 In-Reply-To: <1439254364-15362-1-git-send-email-dave.long@linaro.org> References: <1439254364-15362-1-git-send-email-dave.long@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: dave.long@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.51 as permitted sender) smtp.mailfrom=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: "David A. Long" Add HAVE_REGS_AND_STACK_ACCESS_API feature for arm64. Signed-off-by: David A. Long --- arch/arm64/Kconfig | 1 + arch/arm64/include/asm/ptrace.h | 25 +++++++++++++ arch/arm64/kernel/ptrace.c | 77 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 103 insertions(+) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 318175f..ef5d726 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -70,6 +70,7 @@ config ARM64 select HAVE_PERF_EVENTS select HAVE_PERF_REGS select HAVE_PERF_USER_STACK_DUMP + select HAVE_REGS_AND_STACK_ACCESS_API select HAVE_RCU_TABLE_FREE select HAVE_SYSCALL_TRACEPOINTS select IRQ_DOMAIN diff --git a/arch/arm64/include/asm/ptrace.h b/arch/arm64/include/asm/ptrace.h index d6dd9fd..8f440e9 100644 --- a/arch/arm64/include/asm/ptrace.h +++ b/arch/arm64/include/asm/ptrace.h @@ -118,6 +118,8 @@ struct pt_regs { u64 syscallno; }; +#define MAX_REG_OFFSET (sizeof(struct user_pt_regs) - sizeof(u64)) + #define arch_has_single_step() (1) #ifdef CONFIG_COMPAT @@ -146,6 +148,29 @@ struct pt_regs { #define user_stack_pointer(regs) \ (!compat_user_mode(regs) ? (regs)->sp : (regs)->compat_sp) +/** + * regs_get_register() - get register value from its offset + * @regs: pt_regs from which register value is gotten + * @offset: offset number of the register. + * + * regs_get_register returns the value of a register whose offset from @regs. + * The @offset is the offset of the register in struct pt_regs. + * If @offset is bigger than MAX_REG_OFFSET, this returns 0. + */ +static inline u64 regs_get_register(struct pt_regs *regs, + unsigned int offset) +{ + if (unlikely(offset > MAX_REG_OFFSET)) + return 0; + return *(u64 *)((u64)regs + offset); +} + +/* Valid only for Kernel mode traps. */ +static inline unsigned long kernel_stack_pointer(struct pt_regs *regs) +{ + return regs->sp; +} + static inline unsigned long regs_return_value(struct pt_regs *regs) { return regs->regs[0]; diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c index d882b83..f6199a5 100644 --- a/arch/arm64/kernel/ptrace.c +++ b/arch/arm64/kernel/ptrace.c @@ -48,6 +48,83 @@ #define CREATE_TRACE_POINTS #include +#define ARM_pstate pstate +#define ARM_pc pc +#define ARM_sp sp +#define ARM_x30 regs[30] +#define ARM_x29 regs[29] +#define ARM_x28 regs[28] +#define ARM_x27 regs[27] +#define ARM_x26 regs[26] +#define ARM_x25 regs[25] +#define ARM_x24 regs[24] +#define ARM_x23 regs[23] +#define ARM_x22 regs[22] +#define ARM_x21 regs[21] +#define ARM_x20 regs[20] +#define ARM_x19 regs[19] +#define ARM_x18 regs[18] +#define ARM_x17 regs[17] +#define ARM_x16 regs[16] +#define ARM_x15 regs[15] +#define ARM_x14 regs[14] +#define ARM_x13 regs[13] +#define ARM_x12 regs[12] +#define ARM_x11 regs[11] +#define ARM_x10 regs[10] +#define ARM_x9 regs[9] +#define ARM_x8 regs[8] +#define ARM_x7 regs[7] +#define ARM_x6 regs[6] +#define ARM_x5 regs[5] +#define ARM_x4 regs[4] +#define ARM_x3 regs[3] +#define ARM_x2 regs[2] +#define ARM_x1 regs[1] +#define ARM_x0 regs[0] + +#define REG_OFFSET_NAME(r) \ + {.name = #r, .offset = offsetof(struct pt_regs, ARM_##r)} +#define REG_OFFSET_END {.name = NULL, .offset = 0} + +const struct pt_regs_offset regs_offset_table[] = { + REG_OFFSET_NAME(x0), + REG_OFFSET_NAME(x1), + REG_OFFSET_NAME(x2), + REG_OFFSET_NAME(x3), + REG_OFFSET_NAME(x4), + REG_OFFSET_NAME(x5), + REG_OFFSET_NAME(x6), + REG_OFFSET_NAME(x7), + REG_OFFSET_NAME(x8), + REG_OFFSET_NAME(x9), + REG_OFFSET_NAME(x10), + REG_OFFSET_NAME(x11), + REG_OFFSET_NAME(x12), + REG_OFFSET_NAME(x13), + REG_OFFSET_NAME(x14), + REG_OFFSET_NAME(x15), + REG_OFFSET_NAME(x16), + REG_OFFSET_NAME(x17), + REG_OFFSET_NAME(x18), + REG_OFFSET_NAME(x19), + REG_OFFSET_NAME(x20), + REG_OFFSET_NAME(x21), + REG_OFFSET_NAME(x22), + REG_OFFSET_NAME(x23), + REG_OFFSET_NAME(x24), + REG_OFFSET_NAME(x25), + REG_OFFSET_NAME(x26), + REG_OFFSET_NAME(x27), + REG_OFFSET_NAME(x28), + REG_OFFSET_NAME(x29), + REG_OFFSET_NAME(x30), + REG_OFFSET_NAME(sp), + REG_OFFSET_NAME(pc), + REG_OFFSET_NAME(pstate), + REG_OFFSET_END, +}; + /* * TODO: does not yet catch signals sent when the child dies. * in exit.c or in signal.c.