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[209.132.180.67]) by mx.google.com with ESMTP id c9si59112870pas.144.2015.07.28.23.02.25; Tue, 28 Jul 2015 23:02:26 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752109AbbG2GCY (ORCPT + 25 others); Wed, 29 Jul 2015 02:02:24 -0400 Received: from mail-pa0-f50.google.com ([209.85.220.50]:36657 "EHLO mail-pa0-f50.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750957AbbG2GCW (ORCPT ); Wed, 29 Jul 2015 02:02:22 -0400 Received: by pachj5 with SMTP id hj5so81985110pac.3 for ; Tue, 28 Jul 2015 23:02:22 -0700 (PDT) X-Received: by 10.66.66.202 with SMTP id h10mr88679801pat.145.1438149742001; Tue, 28 Jul 2015 23:02:22 -0700 (PDT) Received: from localhost.localdomain ([180.150.157.4]) by smtp.gmail.com with ESMTPSA id rh11sm38408231pdb.22.2015.07.28.23.02.14 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 28 Jul 2015 23:02:21 -0700 (PDT) From: Leo Yan To: Linus Walleij , Alessandro Zummo , Alexandre Belloni , linux-arm-kernel@lists.infradead.org, rtc-linux@googlegroups.com, linux-kernel@vger.kernel.org, Deepak Saxena Cc: Leo Yan Subject: [PATCH] drivers/rtc/rtc-pl031.c: reset registers in init flow Date: Wed, 29 Jul 2015 14:02:01 +0800 Message-Id: <1438149721-11072-1-git-send-email-leo.yan@linaro.org> X-Mailer: git-send-email 1.9.1 Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: leo.yan@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.172 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , When use rtc-pl031 for suspend test on Hisilicon's SoC Hi6220, Usually the data register (DR) will read back as value zero. So the suspend test code will set the match register (MR) for 10 seconds' timeout; But there have chance later will read back some random values from DR register; So finally miss with match value and will not trigger waken up event anymore. This issue can be dismissed by reset registers in initialization flow; And this code have no harm for ST's variant. Signed-off-by: Leo Yan --- drivers/rtc/rtc-pl031.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/rtc/rtc-pl031.c b/drivers/rtc/rtc-pl031.c index 99181fff..01768de 100644 --- a/drivers/rtc/rtc-pl031.c +++ b/drivers/rtc/rtc-pl031.c @@ -345,6 +345,12 @@ static int pl031_probe(struct amba_device *adev, const struct amba_id *id) dev_dbg(&adev->dev, "designer ID = 0x%02x\n", amba_manf(adev)); dev_dbg(&adev->dev, "revision = 0x%01x\n", amba_rev(adev)); + /* Init registers */ + writel(0x0, ldata->base + RTC_LR); + writel(0x0, ldata->base + RTC_DR); + writel(0x0, ldata->base + RTC_IMSC); + writel(RTC_BIT_AI, ldata->base + RTC_ICR); + data = readl(ldata->base + RTC_CR); /* Enable the clockwatch on ST Variants */ if (vendor->clockwatch)