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[209.132.180.67]) by mx.google.com with ESMTP id hg5si8927778pac.34.2015.07.09.04.49.52; Thu, 09 Jul 2015 04:49:53 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753135AbbGILts (ORCPT + 8 others); Thu, 9 Jul 2015 07:49:48 -0400 Received: from mail-pa0-f46.google.com ([209.85.220.46]:34070 "EHLO mail-pa0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753061AbbGILtl (ORCPT ); Thu, 9 Jul 2015 07:49:41 -0400 Received: by pabvl15 with SMTP id vl15so149371341pab.1 for ; Thu, 09 Jul 2015 04:49:40 -0700 (PDT) X-Received: by 10.68.251.35 with SMTP id zh3mr30233670pbc.166.1436442580188; Thu, 09 Jul 2015 04:49:40 -0700 (PDT) Received: from localhost.localdomain ([202.62.77.106]) by smtp.gmail.com with ESMTPSA id qo1sm5709802pbc.89.2015.07.09.04.49.36 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 09 Jul 2015 04:49:39 -0700 (PDT) From: Vaibhav Hiremath To: linux-arm-kernel@lists.infradead.org Cc: robh+dt@kernel.org, sameo@linux.intel.com, lee.jones@linaro.org, k.kozlowski@samsung.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Vaibhav Hiremath Subject: [PATCH 2/6] mfd: 88pm800: Add init time initial configuration support Date: Thu, 9 Jul 2015 17:17:07 +0530 Message-Id: <1436442431-3471-3-git-send-email-vaibhav.hiremath@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1436442431-3471-1-git-send-email-vaibhav.hiremath@linaro.org> References: <1436442431-3471-1-git-send-email-vaibhav.hiremath@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: devicetree@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: vaibhav.hiremath@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.172 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , This patch adds init time configuration of 88PM800/805 and 88PM860. It includes, - Enable BUCK clock gating in low power mode - Full mode support for BUCK2 and 4 - Enable voltage change (LPF, DVC) in PMIC Note that both 88PM800 and 88PM860 do share common configurations, but since I can not validate the configuration on 88PM800, restricting myself only to 88PM860. If anyone can validate on 88PM800, we can move common code accordingly. Signed-off-by: Vaibhav Hiremath --- drivers/mfd/88pm800.c | 64 +++++++++++++++++++++++++++++++++++++++++++++ include/linux/mfd/88pm80x.h | 13 +++++++++ 2 files changed, 77 insertions(+) diff --git a/drivers/mfd/88pm800.c b/drivers/mfd/88pm800.c index 95c8ad4..80a1bc1 100644 --- a/drivers/mfd/88pm800.c +++ b/drivers/mfd/88pm800.c @@ -521,6 +521,63 @@ out: return ret; } +static int pm800_init_config(struct pm80x_chip *chip, struct device_node *np) +{ + int ret; + unsigned int val; + + switch (chip->type) { + case CHIP_PM800: + case CHIP_PM805: + break; + case CHIP_PM860: + /* Enable LDO and BUCK clock gating in low power mode */ + ret = regmap_update_bits(chip->regmap, PM800_LOW_POWER_CONFIG3, + PM800_LDOBK_FREEZE, PM800_LDOBK_FREEZE); + if (ret) + goto error; + + /* Enable voltage change in pmic, POWER_HOLD = 1 */ + ret = regmap_update_bits(chip->regmap, PM800_WAKEUP1, + PM800_PWR_HOLD_EN, PM800_PWR_HOLD_EN); + if (ret) + goto error; + + /* + * Set buck2 and buck4 driver selection to be full. + * The default value is 0, for full drive support + * it should be set to 1. + * In A1 version it will be set to 1 by default. + * To be on safer side, set it explicitly + */ + ret = regmap_update_bits(chip->subchip->regmap_power, + PM860_BUCK2_MISC2, + PM860_BUCK2_FULL_DRV, + PM860_BUCK2_FULL_DRV); + if (ret) + goto error; + + ret = regmap_update_bits(chip->subchip->regmap_power, + PM860_BUCK4_MISC2, + PM860_BUCK4_FULL_DRV, + PM860_BUCK4_FULL_DRV); + if (ret) + goto error; + + + break; + default: + dev_err(chip->dev, "Unknown device type: %d\n", chip->type); + break; + } + + return 0; + +error: + dev_err(chip->dev, "failed to access registers\n"); + return ret; +} + static int pm800_probe(struct i2c_client *client, const struct i2c_device_id *id) { @@ -585,6 +642,13 @@ static int pm800_probe(struct i2c_client *client, if (pdata->plat_config) pdata->plat_config(chip, pdata); + /* common register configurations , init time only */ + ret = pm800_init_config(chip, np); + if (ret) { + dev_err(chip->dev, "Failed to configure 88pm800 devices\n"); + goto err_device_init; + } + return 0; err_device_init: diff --git a/include/linux/mfd/88pm80x.h b/include/linux/mfd/88pm80x.h index 2e25fb1..2ef62af 100644 --- a/include/linux/mfd/88pm80x.h +++ b/include/linux/mfd/88pm80x.h @@ -74,6 +74,7 @@ enum { /* Wakeup Registers */ #define PM800_WAKEUP1 (0x0D) +#define PM800_PWR_HOLD_EN BIT(7) #define PM800_WAKEUP2 (0x0E) #define PM800_WAKEUP2_INV_INT BIT(0) @@ -87,7 +88,10 @@ enum { /* Referance and low power registers */ #define PM800_LOW_POWER1 (0x20) #define PM800_LOW_POWER2 (0x21) + #define PM800_LOW_POWER_CONFIG3 (0x22) +#define PM800_LDOBK_FREEZE BIT(7) + #define PM800_LOW_POWER_CONFIG4 (0x23) /* GPIO register */ @@ -279,6 +283,15 @@ enum { #define PM805_EARPHONE_SETTING (0x29) #define PM805_AUTO_SEQ_SETTING (0x2A) + +/* 88PM860 Registers */ + +#define PM860_BUCK2_MISC2 (0x7C) +#define PM860_BUCK2_FULL_DRV BIT(2) + +#define PM860_BUCK4_MISC2 (0x82) +#define PM860_BUCK4_FULL_DRV BIT(2) + struct pm80x_rtc_pdata { int vrtc; int rtc_wakeup;