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[2001:1868:205::9]) by mx.google.com with ESMTPS id nt9si441130pbb.235.2015.07.05.19.22.23 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 05 Jul 2015 19:22:24 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org designates 2001:1868:205::9 as permitted sender) client-ip=2001:1868:205::9; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZBw21-0002Pe-Rn; Mon, 06 Jul 2015 02:21:17 +0000 Received: from mail-pa0-f51.google.com ([209.85.220.51]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1ZBw0V-0006an-KD for linux-arm-kernel@lists.infradead.org; Mon, 06 Jul 2015 02:19:44 +0000 Received: by pacgz10 with SMTP id gz10so13161937pac.3 for ; Sun, 05 Jul 2015 19:19:23 -0700 (PDT) X-Received: by 10.70.42.101 with SMTP id n5mr101328268pdl.93.1436149163165; Sun, 05 Jul 2015 19:19:23 -0700 (PDT) Received: from localhost ([120.136.34.248]) by mx.google.com with ESMTPSA id y2sm16205123pdc.91.2015.07.05.19.19.21 (version=TLSv1 cipher=RC4-SHA bits=128/128); Sun, 05 Jul 2015 19:19:22 -0700 (PDT) From: shannon.zhao@linaro.org To: kvmarm@lists.cs.columbia.edu Subject: [PATCH 18/18] KVM: ARM64: Add KVM_CAP_ARM_PMU and KVM_ARM_PMU_SET_IRQ Date: Mon, 6 Jul 2015 10:17:48 +0800 Message-Id: <1436149068-3784-19-git-send-email-shannon.zhao@linaro.org> X-Mailer: git-send-email 1.9.5.msysgit.1 In-Reply-To: <1436149068-3784-1-git-send-email-shannon.zhao@linaro.org> References: <1436149068-3784-1-git-send-email-shannon.zhao@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150705_191943_704575_81DD7956 X-CRM114-Status: GOOD ( 12.32 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.220.51 listed in list.dnswl.org] -0.0 RCVD_IN_MSPIKE_H2 RBL: Average reputation (+2) [209.85.220.51 listed in wl.mailspike.net] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Cc: kvm@vger.kernel.org, marc.zyngier@arm.com, will.deacon@arm.com, linux-arm-kernel@lists.infradead.org, zhaoshenglong@huawei.com, alex.bennee@linaro.org, christoffer.dall@linaro.org, shannon.zhao@linaro.org MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: shannon.zhao@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.53 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 From: Shannon Zhao Add KVM_CAP_ARM_PMU for userspace to check whether KVM supports PMU. Add KVM_ARM_PMU_SET_IRQ for userspace to set PMU IRQ number. Signed-off-by: Shannon Zhao --- arch/arm/kvm/arm.c | 8 ++++++++ include/kvm/arm_pmu.h | 5 +++++ include/uapi/linux/kvm.h | 4 ++++ virt/kvm/arm/pmu.c | 9 +++++++++ 4 files changed, 26 insertions(+) diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c index 41eb063..350866e 100644 --- a/arch/arm/kvm/arm.c +++ b/arch/arm/kvm/arm.c @@ -182,6 +182,7 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext) case KVM_CAP_ARM_PSCI_0_2: case KVM_CAP_READONLY_MEM: case KVM_CAP_MP_STATE: + case KVM_CAP_ARM_PMU: r = 1; break; case KVM_CAP_COALESCED_MMIO: @@ -816,6 +817,13 @@ long kvm_arch_vcpu_ioctl(struct file *filp, return -E2BIG; return kvm_arm_copy_reg_indices(vcpu, user_list->reg); } + case KVM_ARM_PMU_SET_IRQ: { + uint32_t irq; + + if (copy_from_user(&irq, argp, sizeof(irq))) + return -EFAULT; + return kvm_pmu_set_irq_num(vcpu, irq); + } default: return -EINVAL; } diff --git a/include/kvm/arm_pmu.h b/include/kvm/arm_pmu.h index 5bcf27b..1a93f53 100644 --- a/include/kvm/arm_pmu.h +++ b/include/kvm/arm_pmu.h @@ -58,6 +58,7 @@ void kvm_pmu_enable_interrupt(struct kvm_vcpu *vcpu, unsigned long val); void kvm_pmu_software_increment(struct kvm_vcpu *vcpu, unsigned long val); void kvm_pmu_set_counter_event_type(struct kvm_vcpu *vcpu, unsigned long data, unsigned long select_idx); +int kvm_pmu_set_irq_num(struct kvm_vcpu *vcpu, u32 irq); void kvm_pmu_init(struct kvm_vcpu *vcpu); #else void kvm_pmu_sync_hwstate(struct kvm_vcpu *vcpu) {} @@ -76,6 +77,10 @@ void kvm_pmu_enable_interrupt(struct kvm_vcpu *vcpu, unsigned long val) {} void kvm_pmu_software_increment(struct kvm_vcpu *vcpu, unsigned long val) {} void kvm_pmu_set_counter_event_type(struct kvm_vcpu *vcpu, unsigned long data, unsigned long select_idx) {} +int kvm_pmu_set_irq_num(struct kvm_vcpu *vcpu, u32 irq) +{ + return -ENXIO; +} static inline void kvm_pmu_init(struct kvm_vcpu *vcpu) {} #endif diff --git a/include/uapi/linux/kvm.h b/include/uapi/linux/kvm.h index 716ad4a..90f5e73 100644 --- a/include/uapi/linux/kvm.h +++ b/include/uapi/linux/kvm.h @@ -817,6 +817,7 @@ struct kvm_ppc_smmu_info { #define KVM_CAP_DISABLE_QUIRKS 116 #define KVM_CAP_X86_SMM 117 #define KVM_CAP_MULTI_ADDRESS_SPACE 118 +#define KVM_CAP_ARM_PMU 119 #ifdef KVM_CAP_IRQ_ROUTING @@ -1205,6 +1206,9 @@ struct kvm_s390_ucas_mapping { /* Available with KVM_CAP_X86_SMM */ #define KVM_SMI _IO(KVMIO, 0xb7) +/* Available with KVM_CAP_ARM_PMU */ +#define KVM_ARM_PMU_SET_IRQ _IOW(KVMIO, 0xb8, __u32) + #define KVM_DEV_ASSIGN_ENABLE_IOMMU (1 << 0) #define KVM_DEV_ASSIGN_PCI_2_3 (1 << 1) #define KVM_DEV_ASSIGN_MASK_INTX (1 << 2) diff --git a/virt/kvm/arm/pmu.c b/virt/kvm/arm/pmu.c index f957b85..57585e1 100644 --- a/virt/kvm/arm/pmu.c +++ b/virt/kvm/arm/pmu.c @@ -381,6 +381,15 @@ void kvm_pmu_set_counter_event_type(struct kvm_vcpu *vcpu, unsigned long data, pmc->perf_event = event; } +int kvm_pmu_set_irq_num(struct kvm_vcpu *vcpu, u32 irq) +{ + struct kvm_pmu *pmu = &vcpu->arch.pmu; + + kvm_info("kvm_arm_set_pmu_irq: irq: %u\n", irq); + pmu->irq_num = irq; + return 0; +} + /** * kvm_pmu_init - Initialize global PMU state for per vcpu * @vcpu: The vcpu pointer