From patchwork Wed Jul 1 18:28:54 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 50539 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-lb0-f198.google.com (mail-lb0-f198.google.com [209.85.217.198]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id D9340229DF for ; Wed, 1 Jul 2015 18:29:44 +0000 (UTC) Received: by lbcpe5 with SMTP id pe5sf7732157lbc.3 for ; Wed, 01 Jul 2015 11:29:43 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-type :content-transfer-encoding:sender:precedence:list-id :x-original-sender:x-original-authentication-results:mailing-list :list-post:list-help:list-archive:list-unsubscribe; bh=/8l0xtk1U9crPULAItUAKyKGsKzbYW9ZOcixBn6Kvu8=; b=iwlcl32GD+h21VOJ28piLvUxXxj8CZWM2gAwO0OvqK7r6HmVEmTY1F0OWt28pmywn6 13QWtqHwqlcLOh6+lVJwHX1zfSqDa9GRnTsflsGr8yS9rJb7df+/fO2rSiJjpMG9Es0P 5j4ulqmyspH2UiJSKZNkw/+5j7aDd7EQRuBGtrSTvNHsFcwFWO9ka1AgNF3WdRk3qBjN JXTG4IRyV3D8VjKHGWD2o2DD/V7dYo3WauR4wXVwT5DOgp/I5dqZ8QybvbH45QPcCmLl oCgTcdY0D3zTE0xGpGzGLRH6lBfc/lEGzX1sUsSG6ZtDxqbZ3XdrQeKSfJmeLB7B4qyf Az4A== X-Gm-Message-State: ALoCoQkRw8tGBL5jKJuZGEk7fVAUDvZc7mOZTwgf9ySkCmyVLgv7INKXW8v4qc8H9oM7HzJXijZp X-Received: by 10.112.118.194 with SMTP id ko2mr15101126lbb.16.1435775383847; Wed, 01 Jul 2015 11:29:43 -0700 (PDT) X-BeenThere: patchwork-forward@linaro.org Received: by 10.152.37.196 with SMTP id a4ls203637lak.27.gmail; Wed, 01 Jul 2015 11:29:43 -0700 (PDT) X-Received: by 10.152.120.42 with SMTP id kz10mr1465427lab.109.1435775383660; Wed, 01 Jul 2015 11:29:43 -0700 (PDT) Received: from mail-la0-f46.google.com (mail-la0-f46.google.com. [209.85.215.46]) by mx.google.com with ESMTPS id 4si2376997lar.151.2015.07.01.11.29.43 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 01 Jul 2015 11:29:43 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.46 as permitted sender) client-ip=209.85.215.46; Received: by laar3 with SMTP id r3so46393348laa.0 for ; Wed, 01 Jul 2015 11:29:43 -0700 (PDT) X-Received: by 10.112.219.70 with SMTP id pm6mr26063032lbc.41.1435775383472; Wed, 01 Jul 2015 11:29:43 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.108.230 with SMTP id hn6csp786316lbb; Wed, 1 Jul 2015 11:29:42 -0700 (PDT) X-Received: by 10.68.204.133 with SMTP id ky5mr57717939pbc.67.1435775381333; Wed, 01 Jul 2015 11:29:41 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id u9si4732841pbs.1.2015.07.01.11.29.40; Wed, 01 Jul 2015 11:29:41 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753378AbbGAS33 (ORCPT + 29 others); Wed, 1 Jul 2015 14:29:29 -0400 Received: from mail-wi0-f178.google.com ([209.85.212.178]:36824 "EHLO mail-wi0-f178.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752412AbbGAS3U (ORCPT ); Wed, 1 Jul 2015 14:29:20 -0400 Received: by widjy10 with SMTP id jy10so65205674wid.1 for ; Wed, 01 Jul 2015 11:29:18 -0700 (PDT) X-Received: by 10.180.73.145 with SMTP id l17mr9176355wiv.39.1435775358733; Wed, 01 Jul 2015 11:29:18 -0700 (PDT) Received: from zen.linaro.local ([81.128.185.34]) by mx.google.com with ESMTPSA id ei8sm4096601wjd.32.2015.07.01.11.29.16 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 01 Jul 2015 11:29:16 -0700 (PDT) Received: from zen.linaroharston (localhost [127.0.0.1]) by zen.linaro.local (Postfix) with ESMTP id A48863E09ED; Wed, 1 Jul 2015 19:29:15 +0100 (BST) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, christoffer.dall@linaro.org, marc.zyngier@arm.com, peter.maydell@linaro.org, agraf@suse.de, drjones@redhat.com, pbonzini@redhat.com, zhichao.huang@linaro.org Cc: jan.kiszka@siemens.com, dahi@linux.vnet.ibm.com, r65777@freescale.com, bp@suse.de, =?UTF-8?q?Alex=20Benn=C3=A9e?= , Catalin Marinas , Will Deacon , linux-kernel@vger.kernel.org (open list) Subject: [PATCH v7 02/11] KVM: arm64: guest debug, define API headers Date: Wed, 1 Jul 2015 19:28:54 +0100 Message-Id: <1435775343-20034-3-git-send-email-alex.bennee@linaro.org> X-Mailer: git-send-email 2.4.5 In-Reply-To: <1435775343-20034-1-git-send-email-alex.bennee@linaro.org> References: <1435775343-20034-1-git-send-email-alex.bennee@linaro.org> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: alex.bennee@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.46 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , This commit defines the API headers for guest debugging. There are two architecture specific debug structures: - kvm_guest_debug_arch, allows us to pass in HW debug registers - kvm_debug_exit_arch, signals exception and possible faulting address The type of debugging being used is controlled by the architecture specific control bits of the kvm_guest_debug->control flags in the ioctl structure. Signed-off-by: Alex Bennée Reviewed-by: David Hildenbrand Reviewed-by: Andrew Jones Acked-by: Christoffer Dall --- v2 - expose hsr and pc directly to user-space v3 - s/control/controlled/ in commit message - add v8 to ARM ARM comment (ARM Architecture Reference Manual) - add rb tag - rm pc, add far - re-word comments on alignment - rename KVM_ARM_NDBG_REGS -> KVM_ARM_MAX_DBG_REGS v4 - now uses common HW/SW BP define - add a-b-tag - use u32 for control regs v5 - revert to have arch specific KVM_GUESTDBG_USE_SW/HW_BP - rm stale comments dbgctrl was stored as u64 v6 - mv far comment from later patch - KVM_GUESTDBG_USE_HW_BP -> KVM_GUESTDBG_USE_HW - revert control regs to u64 (parity with GET/SET_ONE_REG) --- arch/arm64/include/uapi/asm/kvm.h | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm64/include/uapi/asm/kvm.h b/arch/arm64/include/uapi/asm/kvm.h index d268320..d82f3f3 100644 --- a/arch/arm64/include/uapi/asm/kvm.h +++ b/arch/arm64/include/uapi/asm/kvm.h @@ -100,12 +100,39 @@ struct kvm_sregs { struct kvm_fpu { }; +/* + * See v8 ARM ARM D7.3: Debug Registers + * + * The architectural limit is 16 debug registers of each type although + * in practice there are usually less (see ID_AA64DFR0_EL1). + * + * Although the control registers are architecturally defined as 32 + * bits wide we use a 64 bit structure here to keep parity with + * KVM_GET/SET_ONE_REG behaviour which treats all system registers as + * 64 bit values. It also allows for the possibility of the + * architecture expanding the control registers without having to + * change the userspace ABI. + */ +#define KVM_ARM_MAX_DBG_REGS 16 struct kvm_guest_debug_arch { + __u64 dbg_bcr[KVM_ARM_MAX_DBG_REGS]; + __u64 dbg_bvr[KVM_ARM_MAX_DBG_REGS]; + __u64 dbg_wcr[KVM_ARM_MAX_DBG_REGS]; + __u64 dbg_wvr[KVM_ARM_MAX_DBG_REGS]; }; struct kvm_debug_exit_arch { + __u32 hsr; + __u64 far; /* used for watchpoints */ }; +/* + * Architecture specific defines for kvm_guest_debug->control + */ + +#define KVM_GUESTDBG_USE_SW_BP (1 << 16) +#define KVM_GUESTDBG_USE_HW (1 << 17) + struct kvm_sync_regs { };