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[80.11.198.90]) by mx.google.com with ESMTPSA id lf4sm64675965wjb.42.2015.06.29.08.37.53 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 29 Jun 2015 08:37:54 -0700 (PDT) From: Eric Auger To: eric.auger@st.com, eric.auger@linaro.org, linux-arm-kernel@lists.infradead.org, marc.zyngier@arm.com, christoffer.dall@linaro.org, andre.przywara@arm.com, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org Cc: linux-kernel@vger.kernel.org, patches@linaro.org, p.fedin@samsung.com, pbonzini@redhat.com Subject: [PATCH 5/7] KVM: arm/arm64: build a default routing table Date: Mon, 29 Jun 2015 17:37:15 +0200 Message-Id: <1435592237-17924-6-git-send-email-eric.auger@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1435592237-17924-1-git-send-email-eric.auger@linaro.org> References: <1435592237-17924-1-git-send-email-eric.auger@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: eric.auger@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.51 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Implement a default routing table made of flat irqchip routing entries (gsi = irqchip.pin) covering the VGIC SPI indexes. This routing table is overwritten by the first user-space call to KVM_SET_GSI_ROUTING ioctl. Signed-off-by: Eric Auger --- PATCH: creation --- virt/kvm/arm/vgic.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/virt/kvm/arm/vgic.c b/virt/kvm/arm/vgic.c index 212a5ff..410fee1 100644 --- a/virt/kvm/arm/vgic.c +++ b/virt/kvm/arm/vgic.c @@ -1783,6 +1783,8 @@ int vgic_init(struct kvm *kvm) ret |= vgic_init_bitmap(&dist->irq_cfg, nr_cpus, nr_irqs); ret |= vgic_init_bytemap(&dist->irq_priority, nr_cpus, nr_irqs); + ret |= kvm_setup_default_irq_routing(kvm); + if (ret) goto out; @@ -2264,6 +2266,25 @@ out: return r; } +int kvm_setup_default_irq_routing(struct kvm *kvm) +{ + struct kvm_irq_routing_entry *entries; + u32 nr = kvm->arch.vgic.nr_irqs - VGIC_NR_PRIVATE_IRQS; + int i, ret; + + entries = kcalloc(nr, sizeof(struct kvm_kernel_irq_routing_entry), + GFP_KERNEL); + for (i = 0; i < nr; i++) { + entries[i].gsi = i; + entries[i].type = KVM_IRQ_ROUTING_IRQCHIP; + entries[i].u.irqchip.irqchip = 0; + entries[i].u.irqchip.pin = i; + } + ret = kvm_set_irq_routing(kvm, entries, nr, 0); + kfree(entries); + return ret; +} + int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e, struct kvm *kvm, int irq_source_id, int level, bool line_status)