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[209.132.180.67]) by mx.google.com with ESMTP id w2si22164137pde.152.2015.05.19.09.58.33; Tue, 19 May 2015 09:59:03 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754151AbbESQ6H (ORCPT + 28 others); Tue, 19 May 2015 12:58:07 -0400 Received: from mail-pa0-f47.google.com ([209.85.220.47]:33121 "EHLO mail-pa0-f47.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751596AbbESQzz (ORCPT ); Tue, 19 May 2015 12:55:55 -0400 Received: by padbw4 with SMTP id bw4so32245293pad.0 for ; Tue, 19 May 2015 09:55:55 -0700 (PDT) X-Received: by 10.69.17.130 with SMTP id ge2mr22173534pbd.75.1432054554980; Tue, 19 May 2015 09:55:54 -0700 (PDT) Received: from t430.cg.shawcable.net ([184.64.168.246]) by mx.google.com with ESMTPSA id rx6sm11817453pbc.54.2015.05.19.09.55.53 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 19 May 2015 09:55:54 -0700 (PDT) From: Mathieu Poirier To: gregkh@linuxfoundation.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, zhang.chunyan@linaro.org, kaixu.xia@linaro.org, mathieu.poirier@linaro.org Subject: [PATCH 11/16] coresight: etb: retrieve and handle atclk Date: Tue, 19 May 2015 10:55:16 -0600 Message-Id: <1432054521-24807-12-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1432054521-24807-1-git-send-email-mathieu.poirier@linaro.org> References: <1432054521-24807-1-git-send-email-mathieu.poirier@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: mathieu.poirier@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.43 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Linus Walleij As can be seen from the datasheet of the CoreSight Components, DDI0314 table A-8 the ETB has a clock signal apart from the AHB interconnect ("amba_pclk", that we're already handling) called ATCLK, ARM Trace Clock, that SoC implementers may provide from an entirely different clock source. So to model this correctly create an optional path for handling ATCLK alongside the PCLK so we don't break old platforms that only define PCLK ("amba_pclk") but still makes it possible for SoCs that have both clock signals (such as the DB8500) to fetch and prepare/enable/disable/ unprepare both clocks. The ATCLK is enabled and disabled using the runtime PM callbacks. Reviewed-by: Ulf Hansson Signed-off-by: Linus Walleij Signed-off-by: Mathieu Poirier --- drivers/hwtracing/coresight/coresight-etb10.c | 37 +++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/drivers/hwtracing/coresight/coresight-etb10.c b/drivers/hwtracing/coresight/coresight-etb10.c index df306aef4360..77d0f9c1118d 100644 --- a/drivers/hwtracing/coresight/coresight-etb10.c +++ b/drivers/hwtracing/coresight/coresight-etb10.c @@ -26,6 +26,7 @@ #include #include #include +#include #include "coresight-priv.h" @@ -66,6 +67,7 @@ * struct etb_drvdata - specifics associated to an ETB component * @base: memory mapped base address for this component. * @dev: the device entity associated to this component. + * @atclk: optional clock for the core parts of the ETB. * @csdev: component vitals needed by the framework. * @miscdev: specifics to handle "/dev/xyz.etb" entry. * @spinlock: only one at a time pls. @@ -78,6 +80,7 @@ struct etb_drvdata { void __iomem *base; struct device *dev; + struct clk *atclk; struct coresight_device *csdev; struct miscdevice miscdev; spinlock_t spinlock; @@ -426,6 +429,12 @@ static int etb_probe(struct amba_device *adev, const struct amba_id *id) return -ENOMEM; drvdata->dev = &adev->dev; + drvdata->atclk = devm_clk_get(&adev->dev, "atclk"); /* optional */ + if (!IS_ERR(drvdata->atclk)) { + ret = clk_prepare_enable(drvdata->atclk); + if (ret) + return ret; + } dev_set_drvdata(dev, drvdata); /* validity for the resource is already checked by the AMBA core */ @@ -489,6 +498,32 @@ static int etb_remove(struct amba_device *adev) return 0; } +#ifdef CONFIG_PM +static int etb_runtime_suspend(struct device *dev) +{ + struct etb_drvdata *drvdata = dev_get_drvdata(dev); + + if (drvdata && !IS_ERR(drvdata->atclk)) + clk_disable_unprepare(drvdata->atclk); + + return 0; +} + +static int etb_runtime_resume(struct device *dev) +{ + struct etb_drvdata *drvdata = dev_get_drvdata(dev); + + if (drvdata && !IS_ERR(drvdata->atclk)) + clk_prepare_enable(drvdata->atclk); + + return 0; +} +#endif + +static const struct dev_pm_ops etb_dev_pm_ops = { + SET_RUNTIME_PM_OPS(etb_runtime_suspend, etb_runtime_resume, NULL) +}; + static struct amba_id etb_ids[] = { { .id = 0x0003b907, @@ -501,6 +536,8 @@ static struct amba_driver etb_driver = { .drv = { .name = "coresight-etb10", .owner = THIS_MODULE, + .pm = &etb_dev_pm_ops, + }, .probe = etb_probe, .remove = etb_remove,