From patchwork Sun Apr 26 14:31:02 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 47574 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-wi0-f197.google.com (mail-wi0-f197.google.com [209.85.212.197]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id DD1AD2121F for ; Sun, 26 Apr 2015 14:36:39 +0000 (UTC) Received: by wicmx19 with SMTP id mx19sf12910071wic.3 for ; Sun, 26 Apr 2015 07:36:39 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:from:to:subject:date:message-id :in-reply-to:references:cc:precedence:list-id:list-unsubscribe :list-archive:list-post:list-help:list-subscribe:mime-version :content-type:content-transfer-encoding:sender:errors-to :x-original-sender:x-original-authentication-results:mailing-list; bh=vQAYfSKXEGNHXrW+kjSgRl39SHttUcvXkNfrCkq0XtI=; b=PLdl5AhNGeKJ3rwxHT0uI5oiPgeBLxs/yV3CoLWK92KYnnM1HxNaeI/gICJYi00MTk Wadngxiufcfqk3EcCmyns8msh1sCs8ZNSZrpOhaXcOy3sRNKMqhmcU4RrMwkBCqWnnXz au4nZ7Fw7E+Rx1rKJLzRq3sG+hx4DQ12UIGgO1I1v+mMLOrxn8WqY9l9Fmbj7DmvdU1/ 4Byk8ZPpbE/345GUu5WR3tekbjKLenwomITor+zscHk/vCf4IELiChvRn9wa67G/GQQy CD5qyXHGh36K/7TLGx7BErJYC1ShlSQxH+gvGz6lY/d6wW4/Wwa3FB+z+lA86eHohX4b 9z4w== X-Gm-Message-State: ALoCoQlwsqqVYoxPgJpfHOoWjtKBtr1jl17z/aXjk+xDto5N2bivSq9jv83PMzsP2yc4ZYNXwKpX X-Received: by 10.112.130.71 with SMTP id oc7mr4668354lbb.23.1430058999222; Sun, 26 Apr 2015 07:36:39 -0700 (PDT) X-BeenThere: patchwork-forward@linaro.org Received: by 10.152.178.225 with SMTP id db1ls602534lac.78.gmail; Sun, 26 Apr 2015 07:36:39 -0700 (PDT) X-Received: by 10.152.30.100 with SMTP id r4mr28224lah.107.1430058999015; Sun, 26 Apr 2015 07:36:39 -0700 (PDT) Received: from mail-lb0-f176.google.com (mail-lb0-f176.google.com. [209.85.217.176]) by mx.google.com with ESMTPS id kd4si12735053lbc.42.2015.04.26.07.36.38 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 26 Apr 2015 07:36:38 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.176 as permitted sender) client-ip=209.85.217.176; Received: by lbcga7 with SMTP id ga7so65787092lbc.1 for ; Sun, 26 Apr 2015 07:36:38 -0700 (PDT) X-Received: by 10.112.161.226 with SMTP id xv2mr6463058lbb.106.1430058998733; Sun, 26 Apr 2015 07:36:38 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.67.65 with SMTP id l1csp814358lbt; Sun, 26 Apr 2015 07:36:37 -0700 (PDT) X-Received: by 10.66.119.71 with SMTP id ks7mr13718268pab.147.1430058996790; Sun, 26 Apr 2015 07:36:36 -0700 (PDT) Received: from bombadil.infradead.org (bombadil.infradead.org. [2001:1868:205::9]) by mx.google.com with ESMTPS id n8si25936757pdp.100.2015.04.26.07.36.35 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 26 Apr 2015 07:36:36 -0700 (PDT) Received-SPF: none (google.com: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org does not designate permitted sender hosts) client-ip=2001:1868:205::9; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YmNdm-0001Kz-Rm; Sun, 26 Apr 2015 14:34:38 +0000 Received: from mail-pd0-f182.google.com ([209.85.192.182]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YmNdN-00016j-8l for linux-arm-kernel@lists.infradead.org; Sun, 26 Apr 2015 14:34:14 +0000 Received: by pdbnk13 with SMTP id nk13so100491194pdb.0 for ; Sun, 26 Apr 2015 07:33:52 -0700 (PDT) X-Received: by 10.66.141.171 with SMTP id rp11mr14117832pab.44.1430058832018; Sun, 26 Apr 2015 07:33:52 -0700 (PDT) Received: from localhost.localdomain ([104.207.83.1]) by mx.google.com with ESMTPSA id x2sm16622905pdm.40.2015.04.26.07.33.48 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 26 Apr 2015 07:33:51 -0700 (PDT) From: Shawn Guo To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 01/11] ARM: imx: use dynamic mapping for timer Date: Sun, 26 Apr 2015 22:31:02 +0800 Message-Id: <1430058672-9267-2-git-send-email-shawn.guo@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1430058672-9267-1-git-send-email-shawn.guo@linaro.org> References: <1430058672-9267-1-git-send-email-shawn.guo@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150426_073413_392149_09EA417D X-CRM114-Status: GOOD ( 12.44 ) X-Spam-Score: -0.9 (/) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-0.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.192.182 listed in list.dnswl.org] -0.2 RCVD_IN_MSPIKE_H2 RBL: Average reputation (+2) [209.85.192.182 listed in wl.mailspike.net] -0.0 SPF_PASS SPF: sender matches SPF record Cc: Frank Li , Stephen Boyd , Russell King , kernel@pengutronix.de, Mike Turquette , Shawn Guo X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: shawn.guo@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.176 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 Pass physical address of timer block to mxc_timer_init() call, which in turn does dynamic mapping within the function. Thus, we can avoid using static mapping in clock drivers. Signed-off-by: Shawn Guo --- arch/arm/mach-imx/clk-imx1.c | 2 +- arch/arm/mach-imx/clk-imx21.c | 2 +- arch/arm/mach-imx/clk-imx27.c | 2 +- arch/arm/mach-imx/clk-imx31.c | 2 +- arch/arm/mach-imx/clk-imx35.c | 2 +- arch/arm/mach-imx/common.h | 2 +- arch/arm/mach-imx/time.c | 5 +++-- 7 files changed, 9 insertions(+), 8 deletions(-) diff --git a/arch/arm/mach-imx/clk-imx1.c b/arch/arm/mach-imx/clk-imx1.c index 37c307a8d896..f4a76e841966 100644 --- a/arch/arm/mach-imx/clk-imx1.c +++ b/arch/arm/mach-imx/clk-imx1.c @@ -98,7 +98,7 @@ int __init mx1_clocks_init(unsigned long fref) clk_register_clkdev(clk[IMX1_CLK_DUMMY], "ipg", "imx1-fb.0"); clk_register_clkdev(clk[IMX1_CLK_DUMMY], "ahb", "imx1-fb.0"); - mxc_timer_init(MX1_IO_ADDRESS(MX1_TIM1_BASE_ADDR), MX1_TIM1_INT); + mxc_timer_init(MX1_TIM1_BASE_ADDR, MX1_TIM1_INT); return 0; } diff --git a/arch/arm/mach-imx/clk-imx21.c b/arch/arm/mach-imx/clk-imx21.c index 4b4c75339aa6..facdf1ddd7f1 100644 --- a/arch/arm/mach-imx/clk-imx21.c +++ b/arch/arm/mach-imx/clk-imx21.c @@ -153,7 +153,7 @@ int __init mx21_clocks_init(unsigned long lref, unsigned long href) clk_register_clkdev(clk[IMX21_CLK_I2C_GATE], NULL, "imx21-i2c.0"); clk_register_clkdev(clk[IMX21_CLK_OWIRE_GATE], NULL, "mxc_w1.0"); - mxc_timer_init(MX21_IO_ADDRESS(MX21_GPT1_BASE_ADDR), MX21_INT_GPT1); + mxc_timer_init(MX21_GPT1_BASE_ADDR, MX21_INT_GPT1); return 0; } diff --git a/arch/arm/mach-imx/clk-imx27.c b/arch/arm/mach-imx/clk-imx27.c index ab6349ec23b9..aeb19982a36e 100644 --- a/arch/arm/mach-imx/clk-imx27.c +++ b/arch/arm/mach-imx/clk-imx27.c @@ -229,7 +229,7 @@ int __init mx27_clocks_init(unsigned long fref) clk_register_clkdev(clk[IMX27_CLK_EMMA_AHB_GATE], "ahb", "m2m-emmaprp.0"); clk_register_clkdev(clk[IMX27_CLK_EMMA_IPG_GATE], "ipg", "m2m-emmaprp.0"); - mxc_timer_init(MX27_IO_ADDRESS(MX27_GPT1_BASE_ADDR), MX27_INT_GPT1); + mxc_timer_init(MX27_GPT1_BASE_ADDR, MX27_INT_GPT1); return 0; } diff --git a/arch/arm/mach-imx/clk-imx31.c b/arch/arm/mach-imx/clk-imx31.c index 286ef422cebc..8a103a2c8b68 100644 --- a/arch/arm/mach-imx/clk-imx31.c +++ b/arch/arm/mach-imx/clk-imx31.c @@ -182,7 +182,7 @@ int __init mx31_clocks_init(unsigned long fref) mx31_revision(); clk_disable_unprepare(clk[iim_gate]); - mxc_timer_init(MX31_IO_ADDRESS(MX31_GPT1_BASE_ADDR), MX31_INT_GPT); + mxc_timer_init(MX31_GPT1_BASE_ADDR, MX31_INT_GPT); return 0; } diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c index a0d2b57fd376..4ef1e8bdac5b 100644 --- a/arch/arm/mach-imx/clk-imx35.c +++ b/arch/arm/mach-imx/clk-imx35.c @@ -279,7 +279,7 @@ int __init mx35_clocks_init(void) #ifdef CONFIG_MXC_USE_EPIT epit_timer_init(MX35_IO_ADDRESS(MX35_EPIT1_BASE_ADDR), MX35_INT_EPIT1); #else - mxc_timer_init(MX35_IO_ADDRESS(MX35_GPT1_BASE_ADDR), MX35_INT_GPT); + mxc_timer_init(MX35_GPT1_BASE_ADDR, MX35_INT_GPT); #endif return 0; diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h index 0f04e30b726d..5cddd1534265 100644 --- a/arch/arm/mach-imx/common.h +++ b/arch/arm/mach-imx/common.h @@ -44,7 +44,7 @@ void imx27_soc_init(void); void imx31_soc_init(void); void imx35_soc_init(void); void epit_timer_init(void __iomem *base, int irq); -void mxc_timer_init(void __iomem *, int); +void mxc_timer_init(unsigned long, int); int mx1_clocks_init(unsigned long fref); int mx21_clocks_init(unsigned long lref, unsigned long fref); int mx27_clocks_init(unsigned long fref); diff --git a/arch/arm/mach-imx/time.c b/arch/arm/mach-imx/time.c index 15d18e198303..acb1ff577cda 100644 --- a/arch/arm/mach-imx/time.c +++ b/arch/arm/mach-imx/time.c @@ -344,12 +344,13 @@ static void __init _mxc_timer_init(int irq, setup_irq(irq, &mxc_timer_irq); } -void __init mxc_timer_init(void __iomem *base, int irq) +void __init mxc_timer_init(unsigned long pbase, int irq) { struct clk *clk_per = clk_get_sys("imx-gpt.0", "per"); struct clk *clk_ipg = clk_get_sys("imx-gpt.0", "ipg"); - timer_base = base; + timer_base = ioremap(pbase, SZ_4K); + BUG_ON(!timer_base); _mxc_timer_init(irq, clk_per, clk_ipg); }