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[2001:1868:205::9]) by mx.google.com with ESMTPS id ta8si15831551pac.175.2015.04.17.02.03.39 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 17 Apr 2015 02:03:40 -0700 (PDT) Received-SPF: none (google.com: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org does not designate permitted sender hosts) client-ip=2001:1868:205::9; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Yj2A0-0006q6-PP; Fri, 17 Apr 2015 09:02:04 +0000 Received: from mail-la0-f48.google.com ([209.85.215.48]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Yj289-0004gI-4F for linux-arm-kernel@lists.infradead.org; Fri, 17 Apr 2015 09:00:10 +0000 Received: by lagv1 with SMTP id v1so75219737lag.3 for ; Fri, 17 Apr 2015 01:59:44 -0700 (PDT) X-Received: by 10.152.36.73 with SMTP id o9mr1675261laj.48.1429261184449; Fri, 17 Apr 2015 01:59:44 -0700 (PDT) Received: from localhost.localdomain ([85.235.11.236]) by mx.google.com with ESMTPSA id f7sm2271119lam.17.2015.04.17.01.59.42 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 17 Apr 2015 01:59:43 -0700 (PDT) From: Linus Walleij To: linux-arm-kernel@lists.infradead.org, Mathieu Poirier Subject: [PATCH 06/13] coresight: funnel: let runtime PM handle core clock Date: Fri, 17 Apr 2015 10:58:53 +0200 Message-Id: <1429261140-13910-7-git-send-email-linus.walleij@linaro.org> X-Mailer: git-send-email 1.9.3 In-Reply-To: <1429261140-13910-1-git-send-email-linus.walleij@linaro.org> References: <1429261140-13910-1-git-send-email-linus.walleij@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150417_020009_423139_599E0CB4 X-CRM114-Status: GOOD ( 15.70 ) X-Spam-Score: -0.7 (/) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-0.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.215.48 listed in list.dnswl.org] -0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3) [209.85.215.48 listed in wl.mailspike.net] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 RCVD_IN_MSPIKE_WL Mailspike good senders Cc: Ulf Hansson , "Rafael J. Wysocki" , Russell King , Linus Walleij , Trollkarlen Marklund X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: linus.walleij@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.48 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 This uses runtime PM to manage the PCLK ("amba_pclk") instead of screwing around with the framework by going in and taking a copy from the amba device. The amba bus core will uprepare and disable the clock when the device is unused when CONFIG_PM is selected, else the clock will be always on. Prior to this patch, as the AMBA primecell bus code enables the PCLK, it would be left on after probe as clk_disable_unprepare() was not called. Now the runtime PM callbacks will make sure the PCLK is properly disabled after probe. Signed-off-by: Linus Walleij Reviewed-by: Ulf Hansson --- drivers/coresight/coresight-funnel.c | 24 +++++++----------------- 1 file changed, 7 insertions(+), 17 deletions(-) diff --git a/drivers/coresight/coresight-funnel.c b/drivers/coresight/coresight-funnel.c index 3db36f70b666..330de2c88759 100644 --- a/drivers/coresight/coresight-funnel.c +++ b/drivers/coresight/coresight-funnel.c @@ -18,7 +18,7 @@ #include #include #include -#include +#include #include #include @@ -36,14 +36,12 @@ * @base: memory mapped base address for this component. * @dev: the device entity associated to this component. * @csdev: component vitals needed by the framework. - * @clk: the clock this component is associated to. * @priority: port selection order. */ struct funnel_drvdata { void __iomem *base; struct device *dev; struct coresight_device *csdev; - struct clk *clk; unsigned long priority; }; @@ -67,12 +65,8 @@ static int funnel_enable(struct coresight_device *csdev, int inport, int outport) { struct funnel_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); - int ret; - - ret = clk_prepare_enable(drvdata->clk); - if (ret) - return ret; + pm_runtime_get_sync(drvdata->dev); funnel_enable_hw(drvdata, inport); dev_info(drvdata->dev, "FUNNEL inport %d enabled\n", inport); @@ -98,8 +92,7 @@ static void funnel_disable(struct coresight_device *csdev, int inport, struct funnel_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); funnel_disable_hw(drvdata, inport); - - clk_disable_unprepare(drvdata->clk); + pm_runtime_put(drvdata->dev); dev_info(drvdata->dev, "FUNNEL inport %d disabled\n", inport); } @@ -153,16 +146,14 @@ static u32 get_funnel_ctrl_hw(struct funnel_drvdata *drvdata) static ssize_t funnel_ctrl_show(struct device *dev, struct device_attribute *attr, char *buf) { - int ret; u32 val; struct funnel_drvdata *drvdata = dev_get_drvdata(dev->parent); - ret = clk_prepare_enable(drvdata->clk); - if (ret) - return ret; + pm_runtime_get_sync(drvdata->dev); val = get_funnel_ctrl_hw(drvdata); - clk_disable_unprepare(drvdata->clk); + + pm_runtime_put(drvdata->dev); return sprintf(buf, "%#x\n", val); } @@ -205,8 +196,7 @@ static int funnel_probe(struct amba_device *adev, const struct amba_id *id) return PTR_ERR(base); drvdata->base = base; - - drvdata->clk = adev->pclk; + pm_runtime_put(&adev->dev); desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL); if (!desc)