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[2001:1868:205::9]) by mx.google.com with ESMTPS id en9si28362681pac.90.2015.03.17.03.13.28 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 17 Mar 2015 03:13:29 -0700 (PDT) Received-SPF: none (google.com: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org does not designate permitted sender hosts) client-ip=2001:1868:205::9; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YXoTj-0003Ev-Qc; Tue, 17 Mar 2015 10:12:03 +0000 Received: from mail-wi0-f171.google.com ([209.85.212.171]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YXoTW-00038d-7n for linux-arm-kernel@lists.infradead.org; Tue, 17 Mar 2015 10:11:51 +0000 Received: by wixw10 with SMTP id w10so6542667wix.0 for ; Tue, 17 Mar 2015 03:11:33 -0700 (PDT) X-Received: by 10.194.191.228 with SMTP id hb4mr133725220wjc.116.1426587092919; Tue, 17 Mar 2015 03:11:32 -0700 (PDT) Received: from ards-macbook-pro.local ([90.174.4.220]) by mx.google.com with ESMTPSA id r3sm19260430wjw.7.2015.03.17.03.11.30 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 17 Mar 2015 03:11:32 -0700 (PDT) From: Ard Biesheuvel To: linux-arm-kernel@lists.infradead.org, catalin.marinas@arm.com, will.deacon@arm.com, mark.rutland@arm.com, marc.zyngier@arm.com Subject: [PATCH 3/3] arm64: enforce x1|x2|x3 == 0 upon kernel entry as per boot protocol Date: Tue, 17 Mar 2015 11:11:14 +0100 Message-Id: <1426587074-22390-4-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1426587074-22390-1-git-send-email-ard.biesheuvel@linaro.org> References: <1426587074-22390-1-git-send-email-ard.biesheuvel@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150317_031150_474347_6689F2F4 X-CRM114-Status: GOOD ( 10.22 ) X-Spam-Score: -0.7 (/) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-0.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.212.171 listed in list.dnswl.org] -0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3) [209.85.212.171 listed in wl.mailspike.net] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 RCVD_IN_MSPIKE_WL Mailspike good senders Cc: Ard Biesheuvel X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: ard.biesheuvel@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.52 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 According to the arm64 boot protocol, registers x1 to x3 should be zero upon kernel entry, and non-zero values are reserved for future use. This future use is going to be problematic if we never enforce the current rules, so start enforcing them now, by emitting a warning if non-zero values are detected. Signed-off-by: Ard Biesheuvel --- arch/arm64/kernel/head.S | 8 ++++++++ arch/arm64/kernel/setup.c | 13 +++++++++++++ 2 files changed, 21 insertions(+) diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S index 1651c0fd50e6..fe5354eae069 100644 --- a/arch/arm64/kernel/head.S +++ b/arch/arm64/kernel/head.S @@ -231,6 +231,10 @@ section_table: #endif ENTRY(stext) + adr x8, boot_regs // record the contents of + stp x0, x1, [x8] // x0 .. x3 at kernel entry + stp x2, x3, [x8, #16] + mov x21, x0 // x21=FDT bl el2_setup // Drop to EL1, w20=cpu_boot_mode adrp x24, KERNEL_START - TEXT_OFFSET // x24=PHYS_OFFSET @@ -251,6 +255,10 @@ ENTRY(stext) b __cpu_setup // initialise processor ENDPROC(stext) + .align 3 +ENTRY(boot_regs) + .skip 4 * 8 // x0 .. x3 + /* * Determine validity of the x21 FDT pointer. * The dtb must be 8-byte aligned and live in the first 512M of memory. diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c index 6c5fb5aff325..2b81d0a907ce 100644 --- a/arch/arm64/kernel/setup.c +++ b/arch/arm64/kernel/setup.c @@ -532,3 +532,16 @@ const struct seq_operations cpuinfo_op = { .stop = c_stop, .show = c_show }; + +static int verify_boot_protocol(void) +{ + extern u64 boot_regs[]; + + if (boot_regs[1] || boot_regs[2] || boot_regs[3]) { + pr_err("WARNING: boot protocol violation detected (x1 == %llx, x2 == %llx, x3 == %llx)\n", + boot_regs[1], boot_regs[2], boot_regs[3]); + pr_err("WARNING: your bootloader may fail to load newer kernels\n"); + } + return 0; +} +late_initcall(verify_boot_protocol);