From patchwork Wed Feb 18 15:13:59 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 44777 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-wi0-f197.google.com (mail-wi0-f197.google.com [209.85.212.197]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 8125A21554 for ; Wed, 18 Feb 2015 15:14:44 +0000 (UTC) Received: by mail-wi0-f197.google.com with SMTP id l15sf1718440wiw.0 for ; Wed, 18 Feb 2015 07:14:43 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:sender:precedence:list-id :x-original-sender:x-original-authentication-results:mailing-list :list-post:list-help:list-archive:list-unsubscribe; bh=8i5IdxkP2rPwwGoUl3VxUstUaGzoiilKYBYpZdWod+E=; b=Ou43pgCmH6ANqrbJPgFQsob2i7J/FJpLM89rqTNPsYrYquANrNndjNMvUv3nerJrh6 Sj9d4PYTS5Ke3HWFnX+65s6gPuLBMPV2GbEG9mwhfWbjB1yeAm8wpkPgAnYnS3eBHlJl WON48mA/7aPGVmyLaz4Vhim4+C2Z3CZTzxKLYp2NPg6asdRxBO0+Pm61QryT9+r/ROsh r8PVng1zbm8BKXCT7U5SDvW63Xu9kAL1dGAqFYTse2VSeH5ACrz0aSpR7wF1ii6zPBNp 6ITiUJKEKNPATzySdPw/s6JAQTf/PkGRmX5E7LYJuNDdHWpLxJuk3kP+8tBsITmiOGp1 37Dw== X-Gm-Message-State: ALoCoQks/Eu+Qj8GJKj++pw521s7y0sH7MysZ3gVFK2+WAPS2/asfdxq3M1HcpC1y7wo56yDSmff X-Received: by 10.152.88.40 with SMTP id bd8mr4366337lab.0.1424272483798; Wed, 18 Feb 2015 07:14:43 -0800 (PST) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.152.206.72 with SMTP id lm8ls37423lac.3.gmail; Wed, 18 Feb 2015 07:14:43 -0800 (PST) X-Received: by 10.152.87.134 with SMTP id ay6mr27541374lab.75.1424272483597; Wed, 18 Feb 2015 07:14:43 -0800 (PST) Received: from mail-la0-f51.google.com (mail-la0-f51.google.com. [209.85.215.51]) by mx.google.com with ESMTPS id rb6si13181130lbb.8.2015.02.18.07.14.43 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 18 Feb 2015 07:14:43 -0800 (PST) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.51 as permitted sender) client-ip=209.85.215.51; Received: by labgq15 with SMTP id gq15so1752069lab.6 for ; Wed, 18 Feb 2015 07:14:43 -0800 (PST) X-Received: by 10.152.8.33 with SMTP id o1mr34871704laa.56.1424272483292; Wed, 18 Feb 2015 07:14:43 -0800 (PST) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.35.133 with SMTP id h5csp2911354lbj; Wed, 18 Feb 2015 07:14:42 -0800 (PST) X-Received: by 10.70.123.70 with SMTP id ly6mr59945158pdb.154.1424272481382; Wed, 18 Feb 2015 07:14:41 -0800 (PST) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id xd9si8884465pab.122.2015.02.18.07.14.40; Wed, 18 Feb 2015 07:14:41 -0800 (PST) Received-SPF: none (google.com: linux-kernel-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752595AbbBRPOW (ORCPT + 28 others); Wed, 18 Feb 2015 10:14:22 -0500 Received: from mail-we0-f169.google.com ([74.125.82.169]:37783 "EHLO mail-we0-f169.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752094AbbBRPOO (ORCPT ); Wed, 18 Feb 2015 10:14:14 -0500 Received: by wesw55 with SMTP id w55so1759113wes.4 for ; Wed, 18 Feb 2015 07:14:13 -0800 (PST) X-Received: by 10.180.74.141 with SMTP id t13mr5795059wiv.45.1424272453191; Wed, 18 Feb 2015 07:14:13 -0800 (PST) Received: from localhost.localdomain (host109-148-233-190.range109-148.btcentralplus.com. [109.148.233.190]) by mx.google.com with ESMTPSA id j9sm33068696wjy.18.2015.02.18.07.14.11 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 18 Feb 2015 07:14:12 -0800 (PST) From: Lee Jones To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: lee.jones@linaro.org, kernel@stlinux.com, tglx@linutronix.de, jason@lakedaemon.net, devicetree@vger.kernel.org Subject: [PATCH v3 3/8] irqchip: irq-st: Add documentation for STi based syscfg IRQs Date: Wed, 18 Feb 2015 15:13:59 +0000 Message-Id: <1424272444-16230-4-git-send-email-lee.jones@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1424272444-16230-1-git-send-email-lee.jones@linaro.org> References: <1424272444-16230-1-git-send-email-lee.jones@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: lee.jones@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.51 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Cc: devicetree@vger.kernel.org Signed-off-by: Lee Jones --- .../interrupt-controller/st,sti-irq-syscfg.txt | 35 ++++++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt diff --git a/Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt b/Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt new file mode 100644 index 0000000..ced6014 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt @@ -0,0 +1,35 @@ +STMicroelectronics STi System Configuration Controlled IRQs +----------------------------------------------------------- + +On STi based systems; External, CTI (Core Sight), PMU (Performance Management), +and PL310 L2 Cache IRQs are controlled using System Configuration registers. +This driver is used to unmask them prior to use. + +Required properties: +- compatible : Should be set to one of: + "st,stih415-irq-syscfg" + "st,stih416-irq-syscfg" + "st,stih407-irq-syscfg" + "st,stid127-irq-syscfg" +- st,syscfg : Phandle to Cortex-A9 IRQ system config registers +- st,irq-device : Array of IRQs to enable - should be 2 in length +- st,fiq-device : Array of FIQs to enable - should be 2 in length + +Optional properties: +- st,invert-ext : External IRQs can be inverted at will. This property inverts + these IRQs using bitwise logic. A number of defines have been + provided for convenience: + ST_IRQ_SYSCFG_EXT_1_INV + ST_IRQ_SYSCFG_EXT_2_INV + ST_IRQ_SYSCFG_EXT_3_INV +Example: + +irq-syscfg { + compatible = "st,stih416-irq-syscfg"; + st,syscfg = <&syscfg_cpu>; + st,irq-device = , + ; + st,fiq-device = , + ; + st,invert-ext = <(ST_IRQ_SYSCFG_EXT_1_INV | ST_IRQ_SYSCFG_EXT_3_INV)>; +};