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[209.132.180.67]) by mx.google.com with ESMTP id yl3si6901333pac.62.2015.01.07.22.22.42; Wed, 07 Jan 2015 22:22:42 -0800 (PST) Received-SPF: none (google.com: devicetree-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751950AbbAHGWl (ORCPT + 4 others); Thu, 8 Jan 2015 01:22:41 -0500 Received: from mail-pa0-f41.google.com ([209.85.220.41]:49986 "EHLO mail-pa0-f41.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751491AbbAHGWk (ORCPT ); Thu, 8 Jan 2015 01:22:40 -0500 Received: by mail-pa0-f41.google.com with SMTP id rd3so9812392pab.0 for ; Wed, 07 Jan 2015 22:22:39 -0800 (PST) X-Received: by 10.66.123.7 with SMTP id lw7mr12046510pab.103.1420698159804; Wed, 07 Jan 2015 22:22:39 -0800 (PST) Received: from localhost.localdomain ([111.235.200.50]) by mx.google.com with ESMTPSA id e2sm3441052pdo.11.2015.01.07.22.22.35 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 07 Jan 2015 22:22:39 -0800 (PST) From: Howard Chen To: matthias.bgg@gmail.com Cc: Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Russell King , linux-arm-kernel@lists.infradead.org (moderated list:ARM/Mediatek SoC...), devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND...), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 1/2] ARM: mediatek: Add sysirq device node to mt6592 dtsi Date: Thu, 8 Jan 2015 14:23:10 +0800 Message-Id: <1420698191-10878-1-git-send-email-howard.chen@linaro.org> X-Mailer: git-send-email 1.9.1 Sender: devicetree-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: devicetree@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: howard.chen@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.41 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add sysirq node to mt6592.dtsi and also correct timer interrupt flag. The old setting works because boot loader already set it. With a sysirq device node, the timer interrupt can use a correct value. Signed-off-by: Howard Chen --- arch/arm/boot/dts/mt6592.dtsi | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/mt6592.dtsi b/arch/arm/boot/dts/mt6592.dtsi index 31e5a09..67c8174 100644 --- a/arch/arm/boot/dts/mt6592.dtsi +++ b/arch/arm/boot/dts/mt6592.dtsi @@ -18,7 +18,7 @@ / { compatible = "mediatek,mt6592"; - interrupt-parent = <&gic>; + interrupt-parent = <&sysirq>; cpus { #address-cells = <1>; @@ -81,18 +81,25 @@ timer: timer@10008000 { compatible = "mediatek,mt6577-timer"; reg = <0x10008000 0x80>; - interrupts = ; + interrupts = ; clocks = <&system_clk>, <&rtc_clk>; clock-names = "system-clk", "rtc-clk"; }; + sysirq: interrupt-controller@10200220 { + compatible = "mediatek,mt6592-sysirq", "mediatek,mt6577-sysirq"; + interrupt-controller; + #interrupt-cells = <3>; + interrupt-parent = <&gic>; + reg = <0x10200220 0x1c>; + }; + gic: interrupt-controller@10211000 { compatible = "arm,cortex-a7-gic"; interrupt-controller; #interrupt-cells = <3>; + interrupt-parent = <&gic>; reg = <0x10211000 0x1000>, <0x10212000 0x1000>; }; - }; -