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[70.73.24.112]) by mx.google.com with ESMTPSA id iv1sm42245554pbc.87.2015.01.06.08.37.43 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 06 Jan 2015 08:37:44 -0800 (PST) From: mathieu.poirier@linaro.org To: liviu.dudau@arm.com, sudeep.holla@arm.com, lorenzo.pieralisi@arm.com Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, mathieu.poirier@linaro.org, patches@linaro.org Subject: [PATCH 4/9] coresight-tmc: Adding runtime PM awareness Date: Tue, 6 Jan 2015 09:37:08 -0700 Message-Id: <1420562233-2015-5-git-send-email-mathieu.poirier@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1420562233-2015-1-git-send-email-mathieu.poirier@linaro.org> References: <1420562233-2015-1-git-send-email-mathieu.poirier@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: mathieu.poirier@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.53 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Mathieu Poirier Using the runtime API whenever HW access is required. As such and by associating a coresight component to a power domain in the device tree, faults associated to accessing unpowered devices are mitigated. Signed-off-by: Mathieu Poirier --- drivers/coresight/coresight-tmc.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/coresight/coresight-tmc.c b/drivers/coresight/coresight-tmc.c index ce2c293f1707..274907717a33 100644 --- a/drivers/coresight/coresight-tmc.c +++ b/drivers/coresight/coresight-tmc.c @@ -27,6 +27,7 @@ #include #include #include +#include #include "coresight-priv.h" @@ -249,9 +250,11 @@ static int tmc_enable(struct tmc_drvdata *drvdata, enum tmc_mode mode) if (ret) return ret; + pm_runtime_get_sync(drvdata->dev); spin_lock_irqsave(&drvdata->spinlock, flags); if (drvdata->reading) { spin_unlock_irqrestore(&drvdata->spinlock, flags); + pm_runtime_put_sync(drvdata->dev); clk_disable_unprepare(drvdata->clk); return -EBUSY; } @@ -385,7 +388,7 @@ static void tmc_disable(struct tmc_drvdata *drvdata, enum tmc_mode mode) out: drvdata->enable = false; spin_unlock_irqrestore(&drvdata->spinlock, flags); - + pm_runtime_put_sync(drvdata->dev); clk_disable_unprepare(drvdata->clk); dev_info(drvdata->dev, "TMC disabled\n"); @@ -717,6 +720,9 @@ static int tmc_probe(struct amba_device *adev, const struct amba_id *id) if (ret) goto err_misc_register; + pm_runtime_set_suspended(dev); + pm_runtime_put_noidle(dev); + dev_info(dev, "TMC initialized\n"); return 0;