From patchwork Wed Nov 19 11:23:54 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 41148 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-wg0-f70.google.com (mail-wg0-f70.google.com [74.125.82.70]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id E94CC241C9 for ; Wed, 19 Nov 2014 11:31:16 +0000 (UTC) Received: by mail-wg0-f70.google.com with SMTP id b13sf269669wgh.5 for ; Wed, 19 Nov 2014 03:31:16 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:from:to:subject:date:message-id:cc :precedence:list-id:list-unsubscribe:list-archive:list-post :list-help:list-subscribe:mime-version:sender:errors-to :x-original-sender:x-original-authentication-results:mailing-list :content-type:content-transfer-encoding; bh=XJkiV3TKVhz16j/lepwxqyK2WCDpql05e0xG/xGbd1k=; b=hQmFQAV/DYINxJ6rc8p4FEWK68BufYYpENBUzmBALtV3C2O4FNKU/Jo6OU/jwexQpW uutCAXL0YTyCjzNOzD7VNLhRob5F2w2czfT8jzkQh2sabjCXDCkZGGKsF8SK7De7eauP V19VofCH9B3+83YcP1c16D0xPg0ESdk8Zrx8qiA+IdvjmGyWTEsX076SyZ9A+AiipkZX YygsCWSmuE1/ay+vCtIBP2eoAaQHBUixYbdJp9Lm2U0KSXp7j/+EPAbg5AMWcWTAQsRr F4JhWqmpSU1FffmEmaxddTCteFSiURAtNQRLln09MV4df++jgRrgIOujFYAAsLdyO4Y2 m3nw== X-Gm-Message-State: ALoCoQkiNmXv7i38E5I2OSq8iIwf13vhUx2a3PaRElBdsiGn1KfyNmP6zxDUbb7vsVxQe5CWXEqe X-Received: by 10.180.94.3 with SMTP id cy3mr643197wib.7.1416396676206; Wed, 19 Nov 2014 03:31:16 -0800 (PST) X-BeenThere: patchwork-forward@linaro.org Received: by 10.152.19.39 with SMTP id b7ls1185307lae.38.gmail; Wed, 19 Nov 2014 03:31:16 -0800 (PST) X-Received: by 10.112.166.101 with SMTP id zf5mr4988178lbb.42.1416396676044; Wed, 19 Nov 2014 03:31:16 -0800 (PST) Received: from mail-la0-f48.google.com (mail-la0-f48.google.com. [209.85.215.48]) by mx.google.com with ESMTPS id p5si1495559lbo.69.2014.11.19.03.31.15 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 19 Nov 2014 03:31:15 -0800 (PST) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.48 as permitted sender) client-ip=209.85.215.48; Received: by mail-la0-f48.google.com with SMTP id s18so315927lam.21 for ; Wed, 19 Nov 2014 03:31:15 -0800 (PST) X-Received: by 10.152.42.226 with SMTP id r2mr4918007lal.29.1416396675916; Wed, 19 Nov 2014 03:31:15 -0800 (PST) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.184.201 with SMTP id ew9csp66153lbc; Wed, 19 Nov 2014 03:31:14 -0800 (PST) X-Received: by 10.70.103.102 with SMTP id fv6mr46044310pdb.92.1416396674092; Wed, 19 Nov 2014 03:31:14 -0800 (PST) Received: from bombadil.infradead.org (bombadil.infradead.org. [2001:1868:205::9]) by mx.google.com with ESMTPS id qn7si2333965pbc.63.2014.11.19.03.31.13 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 19 Nov 2014 03:31:14 -0800 (PST) Received-SPF: none (google.com: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org does not designate permitted sender hosts) client-ip=2001:1868:205::9; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Xr3Rp-0007aa-DI; Wed, 19 Nov 2014 11:29:21 +0000 Received: from mail-wg0-f45.google.com ([74.125.82.45]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Xr3Mr-00018J-Hr for linux-arm-kernel@lists.infradead.org; Wed, 19 Nov 2014 11:24:14 +0000 Received: by mail-wg0-f45.google.com with SMTP id b13so550803wgh.18 for ; Wed, 19 Nov 2014 03:23:51 -0800 (PST) X-Received: by 10.194.52.3 with SMTP id p3mr57443713wjo.93.1416396230999; Wed, 19 Nov 2014 03:23:50 -0800 (PST) Received: from ards-macbook-pro.local (cag06-7-83-153-85-71.fbx.proxad.net. [83.153.85.71]) by mx.google.com with ESMTPSA id gy4sm1804231wib.11.2014.11.19.03.23.49 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 19 Nov 2014 03:23:50 -0800 (PST) From: Ard Biesheuvel To: marc.zyngier@arm.com, christoffer.dall@linaro.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH] arm/arm64: KVM: Handle traps of ICC_SRE_EL1 as RAZ/WI Date: Wed, 19 Nov 2014 12:23:54 +0100 Message-Id: <1416396234-6887-1-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 1.8.3.2 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20141119_032413_750438_23FB1570 X-CRM114-Status: GOOD ( 12.75 ) X-Spam-Score: -0.7 (/) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-0.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [74.125.82.45 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3) [74.125.82.45 listed in wl.mailspike.net] -0.0 RCVD_IN_MSPIKE_WL Mailspike good senders Cc: Ard Biesheuvel X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: ard.biesheuvel@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.48 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 From: Christoffer Dall When running on a system with a GICv3, we currenly don't allow the guest to access the system register interface of the GICv3. We do this by clearing the ICC_SRE_EL2.Enable, which causes all guest accesses to ICC_SRE_EL1 to trap to EL2 and causes all guest accesses to other ICC_ registers to cause an undefined exception in the guest. However, we currently don't handle the trap of guest accesses to ICC_SRE_EL1 and will spill out a warning. The trap just needs to handle the access as RAZ/WI, and a guest that tries to prod this register and set ICC_SRE_EL1.SRE=1, must read back the value (which Linux already does) to see if it succeeded, and will thus observe that ICC_SRE_EL1.SRE was not set. Add the simple trap handler in the sorted table of the system registers. Signed-off-by: Christoffer Dall [ardb: added cp15 handling] Signed-off-by: Ard Biesheuvel --- v3: add handling for 32-bit *guests* not 32-bit hosts --- arch/arm64/kvm/sys_regs.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index 4cc3b719208e..3d7c2df89946 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -424,6 +424,11 @@ static const struct sys_reg_desc sys_reg_descs[] = { /* VBAR_EL1 */ { Op0(0b11), Op1(0b000), CRn(0b1100), CRm(0b0000), Op2(0b000), NULL, reset_val, VBAR_EL1, 0 }, + + /* ICC_SRE_EL1 */ + { Op0(0b11), Op1(0b000), CRn(0b1100), CRm(0b1100), Op2(0b101), + trap_raz_wi }, + /* CONTEXTIDR_EL1 */ { Op0(0b11), Op1(0b000), CRn(0b1101), CRm(0b0000), Op2(0b001), access_vm_reg, reset_val, CONTEXTIDR_EL1, 0 }, @@ -690,6 +695,10 @@ static const struct sys_reg_desc cp15_regs[] = { { Op1( 0), CRn(10), CRm( 2), Op2( 1), access_vm_reg, NULL, c10_NMRR }, { Op1( 0), CRn(10), CRm( 3), Op2( 0), access_vm_reg, NULL, c10_AMAIR0 }, { Op1( 0), CRn(10), CRm( 3), Op2( 1), access_vm_reg, NULL, c10_AMAIR1 }, + + /* ICC_SRE */ + { Op1( 0), CRn(12), CRm(12), Op2( 5), trap_raz_wi }, + { Op1( 0), CRn(13), CRm( 0), Op2( 1), access_vm_reg, NULL, c13_CID }, };