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[209.132.180.67]) by mx.google.com with ESMTP id cf17si18763750pdb.137.2014.11.11.07.48.55 for ; Tue, 11 Nov 2014 07:48:55 -0800 (PST) Received-SPF: none (google.com: linux-kernel-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751655AbaKKPsb (ORCPT + 25 others); Tue, 11 Nov 2014 10:48:31 -0500 Received: from foss-mx-na.foss.arm.com ([217.140.108.86]:56153 "EHLO foss-mx-na.foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751011AbaKKPsZ (ORCPT ); Tue, 11 Nov 2014 10:48:25 -0500 Received: from foss-smtp-na-1.foss.arm.com (unknown [10.80.61.8]) by foss-mx-na.foss.arm.com (Postfix) with ESMTP id B14644E0; Tue, 11 Nov 2014 09:48:20 -0600 (CST) Received: from collaborate-mta1.arm.com (highbank-bc01-b06.austin.arm.com [10.112.81.134]) by foss-smtp-na-1.foss.arm.com (Postfix) with ESMTP id 476085FAD7; Tue, 11 Nov 2014 09:48:18 -0600 (CST) Received: from e102391-lin.cambridge.arm.com (e102391-lin.cambridge.arm.com [10.1.209.143]) by collaborate-mta1.arm.com (Postfix) with ESMTP id EE14113F78C; Tue, 11 Nov 2014 09:48:16 -0600 (CST) From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jiang Liu , Thomas Gleixner Cc: Bjorn Helgaas , Yingjoe Chen , Will Deacon , Catalin marinas , Mark Rutland Subject: [PATCH 02/15] PCI/MSI: genirq: allow architecture-specific override of flow handler Date: Tue, 11 Nov 2014 15:48:00 +0000 Message-Id: <1415720893-13371-3-git-send-email-marc.zyngier@arm.com> X-Mailer: git-send-email 2.0.4 In-Reply-To: <1415720893-13371-1-git-send-email-marc.zyngier@arm.com> References: <1415720893-13371-1-git-send-email-marc.zyngier@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: marc.zyngier@arm.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.44 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , ARM interrupt controllers tend to use a "fasteoi" handler rather than the expected "edge". Allow the architecture to override the function call setting up the flow handler by defining arch_msi_irq_set_handler. Signed-off-by: Marc Zyngier --- drivers/pci/msi.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c index 8de7c87..6fea997 100644 --- a/drivers/pci/msi.c +++ b/drivers/pci/msi.c @@ -1113,6 +1113,11 @@ msi_get_hwirq(struct pci_dev *dev, struct msi_desc *desc) (pci_domain_nr(dev->bus) & 0xFFFFFFFF) << 27; } +void __weak arch_msi_irq_set_handler(unsigned int virq) +{ + __irq_set_handler(virq, handle_edge_irq, 0, "edge"); +} + static int msi_domain_alloc(struct irq_domain *domain, unsigned int virq, unsigned int nr_irqs, void *arg) { @@ -1130,7 +1135,7 @@ static int msi_domain_alloc(struct irq_domain *domain, unsigned int virq, irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i, domain->host_data, (void *)(long)i); - __irq_set_handler(virq + i, handle_edge_irq, 0, "edge"); + arch_msi_irq_set_handler(virq + i); } return ret;