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[2001:1868:205::9]) by mx.google.com with ESMTPS id y2si4171845pdi.158.2014.11.03.07.10.41 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 03 Nov 2014 07:10:41 -0800 (PST) Received-SPF: none (google.com: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org does not designate permitted sender hosts) client-ip=2001:1868:205::9; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XlJG0-0004wV-Va; Mon, 03 Nov 2014 15:09:24 +0000 Received: from mail-pa0-f41.google.com ([209.85.220.41]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XlJFi-0004fF-Hb for linux-arm-kernel@lists.infradead.org; Mon, 03 Nov 2014 15:09:07 +0000 Received: by mail-pa0-f41.google.com with SMTP id rd3so12344886pab.28 for ; Mon, 03 Nov 2014 07:08:45 -0800 (PST) X-Received: by 10.68.194.136 with SMTP id hw8mr43660802pbc.17.1415027325572; Mon, 03 Nov 2014 07:08:45 -0800 (PST) Received: from yogesh-Dell-System-Vostro-3360.Airtel4Grouter.cpe ([14.140.2.178]) by mx.google.com with ESMTPSA id mp5sm17413005pbc.33.2014.11.03.07.08.39 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 03 Nov 2014 07:08:44 -0800 (PST) From: Yogesh Tillu To: linux-arm-kernel@lists.infradead.org Subject: [RFC PATCH 4/5]ARM64: Kernel: To read PMU cycle counter through vDSO Path Date: Mon, 3 Nov 2014 20:34:04 +0530 Message-Id: <1415027045-6573-5-git-send-email-yogesh.tillu@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1415027045-6573-1-git-send-email-yogesh.tillu@linaro.org> References: <1415027045-6573-1-git-send-email-yogesh.tillu@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20141103_070906_634243_0B29A0B5 X-CRM114-Status: GOOD ( 10.51 ) X-Spam-Score: -0.7 (/) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-0.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.220.41 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 RCVD_IN_MSPIKE_H3 RBL: Good reputation (+3) [209.85.220.41 listed in wl.mailspike.net] -0.0 RCVD_IN_MSPIKE_WL Mailspike good senders Cc: magnus.karlsson@avagotech.com, tillu.yogesh@gmail.com, Prasun.Kapoor@caviumnetworks.com, linux-perf-users@vger.kernel.org, Andrew.Pinski@caviumnetworks.com, mike.holmes@linaro.org, ola.liljedahl@linaro.org, Yogesh Tillu , linaro-networking@linaro.org, jean.pihet@linaro.org, arnd@linaro.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: yogesh.tillu@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.182 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 Kernel patchset to enable vDSO path for reading PMU cycle counter. Signed-off-by: Yogesh Tillu --- arch/arm64/kernel/vdso/Makefile | 6 +++--- arch/arm64/kernel/vdso/vdso.lds.S | 5 +++++ arch/arm64/kernel/vdso/vdso_perfc.c | 20 ++++++++++++++++++++ 3 files changed, 28 insertions(+), 3 deletions(-) create mode 100644 arch/arm64/kernel/vdso/vdso_perfc.c diff --git a/arch/arm64/kernel/vdso/Makefile b/arch/arm64/kernel/vdso/Makefile index 6d20b7d..4fde490 100644 --- a/arch/arm64/kernel/vdso/Makefile +++ b/arch/arm64/kernel/vdso/Makefile @@ -5,7 +5,7 @@ # Heavily based on the vDSO Makefiles for other archs. # -obj-vdso := gettimeofday.o note.o sigreturn.o +obj-vdso := gettimeofday.o note.o sigreturn.o armpmu.o # Build rules targets := $(obj-vdso) vdso.so vdso.so.dbg @@ -43,8 +43,8 @@ $(obj)/vdso-offsets.h: $(obj)/vdso.so.dbg FORCE $(call if_changed,vdsosym) # Assembly rules for the .S files -$(obj-vdso): %.o: %.S - $(call if_changed_dep,vdsoas) +#$(obj-vdso): %.o: %.S +# $(call if_changed_dep,vdsoas) # Actual build commands quiet_cmd_vdsold = VDSOL $@ diff --git a/arch/arm64/kernel/vdso/vdso.lds.S b/arch/arm64/kernel/vdso/vdso.lds.S index 8154b8d..8cb56e0 100644 --- a/arch/arm64/kernel/vdso/vdso.lds.S +++ b/arch/arm64/kernel/vdso/vdso.lds.S @@ -90,6 +90,11 @@ VERSION __kernel_gettimeofday; __kernel_clock_gettime; __kernel_clock_getres; + /* ADD YOUR VDSO STUFF HERE */ + perf_read_counter; + __vdso_perf_read_counter; + perf_open_counter; + __vdso_perf_open_counter; local: *; }; } diff --git a/arch/arm64/kernel/vdso/vdso_perfc.c b/arch/arm64/kernel/vdso/vdso_perfc.c new file mode 100644 index 0000000..c363d64 --- /dev/null +++ b/arch/arm64/kernel/vdso/vdso_perfc.c @@ -0,0 +1,20 @@ +#include + +int perf_read_counter(void) + __attribute__((weak, alias("__vdso__perf_read_counter"))); +int perf_open_counter(void) + __attribute__((weak, alias("__vdso__perf_open_counter"))); + +#define ARMV8_PMCNTENSET_EL0_ENABLE (1<<31) /**< Enable Perf count reg */ + +__attribute__((no_instrument_function)) int __vdso__perf_read_counter(void) +{ +int ret = 0; +asm volatile("mrs %0, pmccntr_el0" : "=r" (ret)); +return ret; +} + +__attribute__((no_instrument_function)) void __vdso__perf_open_counter(void) +{ +asm volatile("msr pmcntenset_el0, %0" : : "r" (ARMV8_PMCNTENSET_EL0_ENABLE)); +}