From patchwork Mon Oct 27 12:06:38 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Rutland X-Patchwork-Id: 39610 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-wi0-f199.google.com (mail-wi0-f199.google.com [209.85.212.199]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id C2AE02118A for ; Mon, 27 Oct 2014 12:10:55 +0000 (UTC) Received: by mail-wi0-f199.google.com with SMTP id r20sf1847349wiv.10 for ; Mon, 27 Oct 2014 05:10:55 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:from:to:subject:date:message-id :in-reply-to:references:cc:precedence:list-id:list-unsubscribe :list-archive:list-post:list-help:list-subscribe:mime-version:sender :errors-to:x-original-sender:x-original-authentication-results :mailing-list:content-type:content-transfer-encoding; bh=lDEejlcIF0dnC4n5L8PWnNnxtIpfCa7guzxCcMaaw30=; b=md81KUuJHDo/wrvyFAJCmhEDg3g5SEJr0x5jQdoeZ3WsbsLeMGvQa2+UHZNfKrOYuD KKUOYrpLJZmWovOpWyaUnqFdnbjYjvq2maqfGjGKPhbqbSjBLCTcuDl1hmWts8pP4dk1 EzBLory6D7k5tPWs7h+zDA58cefMn5zpZ+TTz2VaEmxrACS54SwyPIAZyBaUCR3L+WnR nPArEx0AkWFSfLp5HLFchDOghFfgt9v77XP0fZ9UL2W3ahWetKOM7P0Exd2ArG0lZxs0 ccpdrKllSPxej2E9EZSSCCXGx+t0ORVkpKTFMv1TgTrPe9s1neNUu1MZKg4EMlvTmn10 jxYQ== X-Gm-Message-State: ALoCoQmpxuNBFS07vrPGHjywfrYvBi9Rz1xNv0UPjF05DxBhAX36ip8oeBHI3LQFTpkhR9HRNiGM X-Received: by 10.112.254.226 with SMTP id al2mr5438273lbd.1.1414411854782; Mon, 27 Oct 2014 05:10:54 -0700 (PDT) X-BeenThere: patchwork-forward@linaro.org Received: by 10.152.42.225 with SMTP id r1ls660598lal.84.gmail; Mon, 27 Oct 2014 05:10:54 -0700 (PDT) X-Received: by 10.152.25.200 with SMTP id e8mr22973499lag.28.1414411854457; Mon, 27 Oct 2014 05:10:54 -0700 (PDT) Received: from mail-la0-f51.google.com (mail-la0-f51.google.com. [209.85.215.51]) by mx.google.com with ESMTPS id l8si19675525lam.40.2014.10.27.05.10.53 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 27 Oct 2014 05:10:53 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.51 as permitted sender) client-ip=209.85.215.51; Received: by mail-la0-f51.google.com with SMTP id q1so2532417lam.10 for ; Mon, 27 Oct 2014 05:10:53 -0700 (PDT) X-Received: by 10.112.189.10 with SMTP id ge10mr22996832lbc.23.1414411853070; Mon, 27 Oct 2014 05:10:53 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.84.229 with SMTP id c5csp277020lbz; Mon, 27 Oct 2014 05:10:52 -0700 (PDT) X-Received: by 10.68.215.100 with SMTP id oh4mr23903040pbc.11.1414411851269; Mon, 27 Oct 2014 05:10:51 -0700 (PDT) Received: from bombadil.infradead.org (bombadil.infradead.org. [2001:1868:205::9]) by mx.google.com with ESMTPS id uy3si10436592pab.42.2014.10.27.05.10.50 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 27 Oct 2014 05:10:51 -0700 (PDT) Received-SPF: none (google.com: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org does not designate permitted sender hosts) client-ip=2001:1868:205::9; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Xij6w-0007mu-V8; Mon, 27 Oct 2014 12:09:22 +0000 Received: from cam-admin0.cambridge.arm.com ([217.140.96.50]) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Xij6E-00070O-Al for linux-arm-kernel@lists.infradead.org; Mon, 27 Oct 2014 12:08:39 +0000 Received: from leverpostej.cambridge.arm.com (leverpostej.cambridge.arm.com [10.1.205.151]) by cam-admin0.cambridge.arm.com (8.12.6/8.12.6) with ESMTP id s9RC6oww022943; Mon, 27 Oct 2014 12:08:14 GMT From: Mark Rutland To: linux-arm-kernel@lists.infradead.org Subject: [PATCHv2 8/9] arm: perf: dynamically allocate cpu hardware data Date: Mon, 27 Oct 2014 12:06:38 +0000 Message-Id: <1414411599-1938-9-git-send-email-mark.rutland@arm.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1414411599-1938-1-git-send-email-mark.rutland@arm.com> References: <1414411599-1938-1-git-send-email-mark.rutland@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20141027_050838_729088_1CC13E20 X-CRM114-Status: GOOD ( 12.37 ) X-Spam-Score: -5.6 (-----) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-5.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [217.140.96.50 listed in list.dnswl.org] -0.6 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -0.0 SPF_PASS SPF: sender matches SPF record Cc: Mark Rutland , pawel.moll@arm.com, will.deacon@arm.com, punit.agrawal@arm.com, sboyd@codeaurora.org, drew.richardson@arm.com X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: mark.rutland@arm.com X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.51 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 To support multiple PMUs, each PMU will need its own accounting data. As we don't know how (in general) many PMUs we'll have to support at compile-time, we must allocate the data at runtime dynamically Signed-off-by: Mark Rutland Reviewed-by: Stephen Boyd --- arch/arm/kernel/perf_event_cpu.c | 33 +++++++++++++++++++++++++-------- 1 file changed, 25 insertions(+), 8 deletions(-) diff --git a/arch/arm/kernel/perf_event_cpu.c b/arch/arm/kernel/perf_event_cpu.c index 5eecfe9..6e550cf 100644 --- a/arch/arm/kernel/perf_event_cpu.c +++ b/arch/arm/kernel/perf_event_cpu.c @@ -35,8 +35,6 @@ /* Set at runtime when we know what CPU type we are. */ static struct arm_pmu *cpu_pmu; -static DEFINE_PER_CPU(struct pmu_hw_events, cpu_hw_events); - /* * Despite the names, these two functions are CPU-specific and are used * by the OProfile/perf code. @@ -162,16 +160,22 @@ static int cpu_pmu_request_irq(struct arm_pmu *cpu_pmu, irq_handler_t handler) return 0; } -static void cpu_pmu_init(struct arm_pmu *cpu_pmu) +static int cpu_pmu_init(struct arm_pmu *cpu_pmu) { int cpu; + struct pmu_hw_events __percpu *cpu_hw_events; + + cpu_hw_events = alloc_percpu(struct pmu_hw_events); + if (!cpu_hw_events) + return -ENOMEM; + for_each_possible_cpu(cpu) { - struct pmu_hw_events *events = &per_cpu(cpu_hw_events, cpu); + struct pmu_hw_events *events = per_cpu_ptr(cpu_hw_events, cpu); raw_spin_lock_init(&events->pmu_lock); events->percpu_pmu = cpu_pmu; } - cpu_pmu->hw_events = &cpu_hw_events; + cpu_pmu->hw_events = cpu_hw_events; cpu_pmu->request_irq = cpu_pmu_request_irq; cpu_pmu->free_irq = cpu_pmu_free_irq; @@ -182,6 +186,13 @@ static void cpu_pmu_init(struct arm_pmu *cpu_pmu) /* If no interrupts available, set the corresponding capability flag */ if (!platform_get_irq(cpu_pmu->plat_device, 0)) cpu_pmu->pmu.capabilities |= PERF_PMU_CAP_NO_INTERRUPT; + + return 0; +} + +static void cpu_pmu_destroy(struct arm_pmu *cpu_pmu) +{ + free_percpu(cpu_pmu->hw_events); } /* @@ -303,12 +314,18 @@ static int cpu_pmu_device_probe(struct platform_device *pdev) goto out_free; } - cpu_pmu_init(cpu_pmu); + ret = cpu_pmu_init(cpu_pmu); + if (ret) + goto out_free; + ret = armpmu_register(cpu_pmu, -1); + if (ret) + goto out_destroy; - if (!ret) - return 0; + return 0; +out_destroy: + cpu_pmu_destroy(cpu_pmu); out_free: pr_info("failed to register PMU devices!\n"); kfree(pmu);